Laurence Marchini, Editor, writes:
We see from your search that you're looking for information on the term "ASIC design",
and we have a large number of manufacturers' news releases and technical articles here on Electronicstalk which will be of interest.
Let me be your guide.
Start with
the news release Cherry-picking in the electronics jobs market from
Technojobs, which we summarised at the time by saying "Although overall the electronics market shows static pay, certain electronics job titles are showing remarkable growth in salaries advertised".
A few weeks before,
we featured the news release Reference methodologies speed ARM design from
Cadence Design Systems: "Methodologies for two ARM processors provide enhanced design solutions to mutual customers designing multicore, low-power devices".
In August 2007, we covered the news from ChipX
concerning its XPath
- take a look at Methodology eases product launches
which says: "XPath enables customers to get products to market quickly and inexpensively and will play a valued role in the production of ASICs for a wide variety of applications".
Take a look also at the news release from Faraday Technology, UWB MAC speeds comms with fewer pins,
as well as ASIC designs are traded optimised in RTL from Faraday Technology,
and Distribution deal expands ASIC access from ChipX.
See also:
32bit processor cores expand ASIC options
(June 2007)
A licensing agreement with Beyond Semiconductor brings a family of 32bit processors to ChipX standard cell ASIC, embedded array ASIC and structured ASIC platforms
Timing constraint signoff tool passes the test
(June 2007)
AMI Semiconductor has adopted Cadence Encounter Conformal Constraint Designer XL as its ASIC timing constraint signoff tool
Acquisition adds verification hardware to software
(June 2007)
Synplicity has signed a definitive agreement to acquire Hardi Electronics for US $24.2 million in cash
Collaboration to improve ASIC verification
(May 2007)
Synopsys and Synplicity have agreed to work together on next-generation high-performance verification solutions for ASIC designers
Agreement expands ARM core offerings
(May 2007)
New licence agreement extends VeriSilicon's ARM926EJ-S processor-based current offering to fully synthesisable capabilities and configurable cache systems
PowerPC microprocessors are base for custom SoCs
(May 2007)
VeriSilicon Holdings has signed an agreement with IBM to offer the PowerPC 405 and 440 microprocessors
Topographical technology aids ASIC layout
(May 2007)
IBM has added support for topographical technology in its 90 and 65nm based application specific integrated circuit (ASIC) design kits
Processors and memories meet military specs
(May 2007)
Components meet stringent reliability requirements for computers operating in technically advanced military and commercial aerospace conditions
Early verification boosts IC design productivity
(April 2007)
Unisys boosts productivity and overall quality, delivering advanced complex chips at multiple sites, by integrating the Incisive Formal Verifier into its design flow
Software develops RTL code automatically
(April 2007)
Synplify DSP ASIC Edition software allows designers to explore speed and area tradeoffs, often leading to significant area and timing improvements over hand-coded approaches
New name in the RF transceiver market
(April 2007)
Axsem will maintain the mixed-signal design knowhow and technologies e-vision has developed over the years
High density SRAM for system on chip
(April 2007)
A large amount of embedded memory on a competitively priced consumer-oriented SoC will enhance the real-time conference-calling capabilities of mobile phones
ASIC prototyping board boasts biggest FPGA
(April 2007)
The first member in the new HAPS-50 family is HAPS-52 which has a capacity of 4 million ASIC gates
University is 30th Chinese training centre
(April 2007)
The Joint Laboratory and Training Centre (JLTC) at South China Normal University in China is the 30th such training centre Altera has established in China
Hard cores boast best price performance ratio
(April 2007)
Faraday Technology Corp has implemented the ARM926EJ-S hard core in UMC's 0.13um process
Automated flow speeds Cortex-A8 designs
(March 2007)
Synopsys has announced the immediate availability of a fully automated implementation flow enabled by Synopsys IC Compiler for high-performance and low-power applications
PLD maker complies with arms trade rules
(March 2007)
The US Department of State has certified that Altera's HardCopy II structured ASIC design and manufacturing flow is compliant with International Trade in Arms Regulations (ITAR)
Design Compiler boosts ASIC development
(February 2007)
STMicroelectronics has deployed Synopsys Design Compiler topographical technology in its 90nm and 65nm ASIC design flow to speed up design time
Sherwani joins technical advisory board
(February 2007)
Dr Naveed Sherwani, cofounder, President and CEO of fabless ASIC company Open-Silicon, has joined Pyxis' Technical Advisory Board (TAB)
Prototyping software makes the most of 65nm FPGAs
(January 2007)
ASIC RTL prototyping software delivers optimal support for the Xilinx Virtex-5 family of 65nm FPGAs
Compiler improves timing on large ASIC blocks
(January 2007)
Renesas Technology Corp has adopted Cadence Encounter RTL Compiler with advanced global synthesis in its ASIC design kits and methodologies for 90nm and below
News on the IBM 65nm ASIC design kit from Cadence Design Systems
(November 2006)
Cadence Design Systems has signed an agreement to incorporate Encounter RTL Compiler global synthesis and Encounter Test technologies into the IBM 65nm ASIC design kit
Analogue arrays ease mixed-signal ASIC design
(November 2006)
AMI Semiconductor has expanded its capabilities by offering new analogue array methodology
Marcisz leads US sales offensive
(November 2006)
Solido Design Automation has opened its US sales and support office and has appointed Zdzislaw 'Z' Marcisz as Sales Director
Programmable ASICs add support in Italy and Sweden
(October 2006)
eASIC Corp has signed up two new European channel partners
European IC consultancy expands in Israel
(September 2006)
IC consultancy Sondrel has expanded its presence in Israel with the appointment of Adi Snir as General Manager of its operations in the region
Industry veteran to attract design talent
(September 2006)
Zetex has appointed accomplished semiconductor industry veteran Dr Franz Riedlberger to head its technology department
ProDesign releases chipit copper edition
(July 2006)
ProDesign releases chipit copper edition at the 43rd DAC
Neuroscientists sign up for ASIC design
(July 2006)
Medical device company Northstar Neuroscience has selected AMI Semiconductor to design and manufacture an ASIC for its novel stroke recovery system
SoC prototyping is efficient for smaller designs
(July 2006)
The Chipit Iridium Edition offers ASIC and SoC design engineers unprecedented speed and flexibility to verify and debug their designs
VeriSilicon acquires LSI's DSP business
(July 2006)
LSI Logic Corp has sold the assets of its ZSP digital signal processor unit to VeriSilicon Holdings for approximately $13 million in cash and stock
Low power clocking software goes below 65nm
(July 2006)
PowerCentric version 3 extends its 15-25% power reduction capabilities to support advanced variability-aware design flows at 65nm and below
Free flow protects the industry's IP
(June 2006)
A free, nonproprietary IP encryption flow enables industry-wide interoperability
45nm process set to sample in 2007
(June 2006)
A 45nm manufacturing process uses 'wet' lithography to double the number of ICs produced on each silicon wafer, increase processing performance and reduce power consumption