Laurence Marchini, Editor, writes:
We see from your search that you're looking for information on the term "ASIC synthesis",
and we have a large number of manufacturers' news releases and technical articles here on Electronicstalk which will be of interest.
Let me be your guide.
Start with
the news release RISC processor cores come without royalties from
EDA Solutions, which we summarised at the time by saying "Mosis, the multiproject wafer (MPW) services provider, has partnered with Cambridge Consultants to offer customers royalty-free access to the XAP4 and XAP5 16bit RISC processor cores".
Earlier in the week,
we featured the news release Software makes more of programmable platforms from
Softjin Technologies: "The Programmable Synthesis Engine is a logic optimisation and mapping software product that is customisable for a variety of programmable platform architectures".
In January 2006, we covered the news from LSI Europe
concerning its Synplicity Partners in Prototyping
- take a look at Prototyping platform joins the programme
which says: "An ARM processor prototyping platform is designed to ensure faster system development and a flawless transition to custom silicon, for both standard cell or platform ASIC designs".
Take a look also at the news release from Synplicity, Samsung joins the Synplify ASIC fan club,
as well as Support assured with partnership extension from Synplicity,
and Another hat in the ring from ChipX.
See also:
Timing estimation to become placement aware
(February 2004)
Synplicity is to offer timing estimation based on placement and automatic initial floorplanning as an alternative to traditional wireload model-based RTL synthesis in future releases of Synplify ASIC
Rapid adoption for ASIC synthesis technology
(February 2004)
Synplicity has reported rapid adoption of its ASIC synthesis technology, including a doubling of ASIC synthesis licence revenues during 2003
Physical synthesis aids structured ASIC design
(October 2003)
NEC Electronics and Synplicity are expanding their joint development and marketing agreement
Synplicity meets financial objectives
(July 2003)
Synplicity has revealed its financial results for the quarter ended 30th June 2003
Libraries ease switch to structured ASIC design
(June 2003)
Chip Express has endorsed Synplicity's Synplify ASIC software within its structured ASIC flow
Improved quality of results for ASIC design
(January 2003)
The latest version of the Synplify ASIC software from Synplicity provides designers of complex ASICs and SoCs with advanced timing, area and runtime performance
Capacity and accuracy boost RTL-to-GDSII solution
(October 2002)
Dolphin RTL is a second-generation RTL-to-GDSII solution, and the culmination of an 18-month collaborative effort between Monterey and Synplicity
Synplicity moves to expand
(September 2002)
Synplicity has relocated its worldwide headquarters to a larger facility to accommodate the growth the company has experienced
Synplicity completes acquisitions from IOTA
(July 2002)
Synplicity has completed its acquisition of key products and technology from IOTA Technology
Synplicity set to acquire Iota's power technology
(June 2002)
Synplicity is set to acquire key products and core signal integrity and power analysis technology that will be used in the development of advanced synthesis tools for next-generation ASICs and SoCs
SoC tape-out success for Canon
(June 2002)
Canon has successfully used Synplicity's Synplify ASIC synthesis software to tape out a complex system-on-chip design
Synthesis extended to IBM ASICs
(June 2002)
Synplify ASIC synthesis software is now qualified for use by IBM's ASIC customers
Faraday ASICs support Synplicity
(May 2002)
Faraday Technology Corp now supports Synplicity's Synplify ASIC synthesis software in its ASIC design tool kit
Altera and Synopsis to simplify SoPC design
(November 2001)
Altera and Synopsys are to create ASIC-like design solutions for system-on-programmable-chip devices to meet the need for next-generation design and verification flows for high-density PLDs
Software automatically partitions FPGA designs
(August 2001)
Synplicity has automated its Certify verification synthesis software to speed the development of FPGA-based ASIC prototypes
Monterey gathers its partners in innovation
(June 2001)
The Monterey Design Systems Partners in Innovation programme aims to bring together companies involved in IC development and ASIC design that have complementary and innovative technology
Partners to accelerate FPGA-to-ASIC retargeting
(June 2001)
AMI Semiconductor and Synplicity plan to jointly develop, test and promote a next-generation design flow to solve new performance and productivity needs related to high-density FPGA conversions
Power Compiler adds pushbutton power optimisation
(June 2001)
Oki Semiconductor has added Power Compiler, Synopsys' pushbutton power optimisation tool for RTL and gate-level designs, to the set of Synopsys tools offered in Oki's advanced ASIC design kit