Laurence Marchini, Editor, writes:
We see from your search that you're looking for information on the term "Design verification",
and we have a large number of manufacturers' news releases and technical articles here on Electronicstalk which will be of interest.
Let me be your guide.
Start with
the news release Waveform analyser handles spread-spectrum clocking from
Agilent Technologies Europe, which we summarised at the time by saying "The Agilent 86108A waveform analyser can trigger directly from a single-ended or differential data signal, eliminating the need for a separate trigger input".
A few weeks before,
we featured the news release CMOS image sensors made with smaller pixels from
Tower Semiconductor: "The Tower platform is a very attractive option for customers seeking high resolution, low noise and small form factor".
In October 2007, we covered the news from Tektronix
concerning its DPOJET
- take a look at Oscilloscope software monitors jitter
which says: "DPOJET maximises the timing and jitter measurements of complex clock, digital and serial data signals".
Take a look also at the news release from Altium, Software eases FPGA design,
as well as Signal analyser eases troubleshooting from Agilent Technologies Europe,
and Verification library receives approval from Accellera.
See also:
Tester drives DisplayPort adoption
(August 2007)
High-performance serial bit error rate tester enables high-quality measurements for the emerging DisplayPort standard
Express IP has all options covered
(July 2007)
Flexible and configurable PCI Express controller IP can be used for end-point, root complex, switch and bridge implementations
Single simulator covers all IC technologies
(May 2007)
End-to-end simulation and verification software for custom IC uses a common database of netlists and models to simulate analogue, RF, memory and mixed-signal designs
Functional verification expands in scope
(May 2007)
Platform addresses low-power verification and incorporates verification management capabilities that enable closed-loop management reporting, analysis and documentation
Power management technology updated
(May 2007)
Zarlink Semiconductor's new WPX power management process allows designs to be developed using fewer layers, reducing manufacturing costs
Companies combine to verify wireless equipment
(May 2007)
Companies collaborate to produce an integrated and efficient means of verifying baseband designs with dynamic, accurate, bidirectional network simulations of embedded systems
HDMI test package stands the test of compliance
(April 2007)
Following an evaluation period of three months, Silicon Image has specified an HDMI 1.3 compliance test package for use in all of its authorised test centres
Chip layout tool adds 3D RC extraction
(April 2007)
Tool reduces design errors and shortens the design verification process, particularly for deep submicron technologies where interconnect delays start to play a dominant role
Flormerics' software reduces time to market
(April 2007)
An independent survey found that users of thermal-analysis software have over 40% fewer respins on average per printed circuit board (PCB) design than non-users
New interface simplifies design verification
(April 2007)
Co-simulation support for fixed-point in Simulink simplifies verification of hardware designs in Active-HDL
Mixed-signal scope aids embedded debug
(April 2007)
Mixed signal oscilloscopes combine three powerful capabilities into one small and lightweight portable device for embedded design and debug
WiMAX technologies explained
(April 2007)
Wall poster is a reference tool to help engineers understand the evolving communication standard by describing detail and contrasting fixed and mobile WiMAX technologies
Wireless test expertise attracts funding
(March 2007)
LitePoint Corp has completed a round of private equity funding from Sequoia Capital
Principal status strengthens WiMAX test solutions
(March 2007)
Agilent has been actively involved in the WiMAX Forum since 2004, introducing test equipment to support WiMAX technology
Analogue simulator handles larger volumes of data
(March 2007)
New tool suite will feature a 3D RF extraction tool that uses a field solver technique to calculate interconnect parasitics in three dimensions
CPU chip aids ARM-based SoC design
(February 2007)
Faraday Technology Corp has announced the FPGACompanion (FC) CPU chip, targeted at system companies who need a full-featured ARM CPU chip that can easily be interfaced to various FPGA devices
Test system supports Assisted GPS development
(February 2007)
Nemerix has standardised its GPS testing activities on Spirent's new ULTS-ADS testing platform
Design flow adds assertion-based formal analysis
(February 2007)
3Leaf Networks has incorporated the Cadence Incisive Formal Verifier into its overall design flow for assertion-based formal analysis
ST leads European embedded project
(February 2007)
A strategic targeted research project aims to ensure that the European electronics industry continues to maintain its competitive position in embedded systems
EDA tool suite features 11 upgrades
(January 2007)
Tanner Tools 12.2 is the latest release of the Windows-based EDA tool suite for analogue, mixed-signal and MEMS design from Tanner EDA
Read between the lines of test chamber specs
(December 2006)
Determining which HALT or HASS chamber can best meet your reliability programme requirements takes more than a quick glance of spec sheets
Software supports parallel design verification
(November 2006)
ProDesign has added Design Duplication as a new feature to support Chipit, the company's successful product family of high-speed ASIC prototyping and verification systems
Transistor Devices deal expands across Europe
(November 2006)
Expanded agreement with Transistor Devices, the US-based power supply systems manufacturer, consolidates UR's position as a supplier of TDI products in all major European markets
Verification environment moves up to Stratix III
(November 2006)
Aldec has announced System Verification Environment (SVE) support for Altera Corporation's new high-end Stratix III FPGA device family
LDMOS process marries logic with power
(November 2006)
Tower Semiconductor has launched a laterally diffused metal oxide semiconductor (LDMOS) process, the latest addition to its 0.18um technology platform
Process technologies improve power management
(November 2006)
Zarlink Semiconductor has announced the release of an enhanced WPX and WPY process with a high beta early voltage lateral PNP transistor
WiMAX testers aid design validation
(November 2006)
Agilent Technologies' WiMAX-specific design validation and production solutions have been successfully delivered and accepted by several customers
BiCMOS process has powerful intelligence
(November 2006)
Submicron BiCMOS process technology specifically addresses increasing customer demand for control and intelligence in power management chips
Design-for-test tool runs at-speed
(October 2006)
LogicVision has unveiled its ScanBurst tool and has partnered with Mentor Graphics to deliver a unique and improved at-speed test solution for high-speed nanometre designs
Compression software improves ATPG
(October 2006)
TestKompress 2007 is an enhanced version of the ground-breaking tool from Mentor Graphics that introduced scan test pattern compression to the marketplace
Low-power spec becomes open industry standard
(September 2006)
Mentor Graphics has donated its Power Configuration File specification and guidelines for modelling power-aware cells to Accellera's Unified Power Format Technical Subcommittee
Survey illustrates design conflicts
(August 2006)
Survey highlights the conflict that often occurs between meeting thermal, electromagnetic compatibility and signal integrity design requirements in the development of new PCB designs
Test programs take in design verification
(August 2006)
LitePoint Corp has announced design verification test functionally for its IQfact test program family
Ansoft joins Novas harmony partner program
(July 2006)
Nexxim integrates with Novas' Verdi debug system for rapid viewing and exchange of verification results