Laurence Marchini, Editor, writes:
We see from your search that you're looking for information on the term "EDA vendor",
and we have a large number of manufacturers' news releases and technical articles here on Electronicstalk which will be of interest.
Let me be your guide.
Start with
the news release Unified Power Format becomes industry standard from
Accellera, which we summarised at the time by saying "The Board of Accellera, the electronics industry organisation focused on electronic design automation standards, has approved the Unified Power Format (UPF) 1.0 as an Accellera standard".
Several months prior to that,
we featured the news release Layout software handles fine-pitch FPGA packages from
Zuken: "Zuken is providing free footprint downloads for Altera's new MAX II CPLD FineLine BGA (FBGA) and Micro FineLine BGA (MBGA) packages".
In June 2006, we covered the news from Synplicity
concerning its IP encryption flow
- take a look at Free flow protects the industry's IP
which says: "A free, nonproprietary IP encryption flow enables industry-wide interoperability".
Take a look also at the news release from ArchPro Design Automation, Tools complete power management design cycle,
as well as SystemVerilog pioneers recognised by IEEE from Mentor Graphics UK,
and Software accounts for all sources of signal loss from Mentor Graphics UK.
See also:
Project focuses microelectronic EMC system design
(July 2005)
Zuken has been the EDA vendor representative in a multinational research project on a microelectronic EMC system design for high density interconnect and high frequency environments
Board speeds electronic system level design
(February 2005)
The RC250 is a high-performance FPGA development board for complex system design and is available with an out-of-the-box suite of ESL design software, IP and system level APIs
Gianfagna takes control
(February 2005)
Aprio Technologies has signed up Mike Gianfagna as its new President and Chief Executive Officer
Design software is made for Altera
(January 2005)
Available now from Aldec, Active-HDL 6.3, Altera Edition features direct support and automation for Altera's Quartus II design software version 4.2, Stratix II FPGAs and HardCopy II structured ASICs
FPGA synthesis boasts boost to productivity
(January 2005)
Synplicity has unveiled major enhancements to its industry-leading FPGA synthesis software
Support centres certified worldwide
(December 2004)
The Mentor Graphics Customer Support Division has been certified for the sixth consecutive year under the prestigious Support Centre Practices (SCP) Certification Programme
Design software takes in latest FPGA developments
(December 2004)
The Nexar system design software suite has been updated to support v4.2 of Altera's Quartus II development software
'FPGA readiness' is key to PCB design software
(August 2004)
Altium is supporting Mentor Graphics' push to solve the emerging FPGA-to-board problems facing designers using high-capacity programmable logic
New flow speeds 62-million-transistor to tape-out
(July 2004)
Cadence has provided a complete back-end design flow for one of Motorola's most complex chips, incorporating more than 62 million transistors
Software speeds Stratix II designs
(March 2004)
Aldec now supports Altera's latest high-density Stratix II FPGA device family with its graphical design entry tool, Design Flow Manager, as well as its mixed-VHDL and Verilog simulator
Investors queue up to follow Carbon
(January 2004)
Carbon Design Systems has raised a $10 million series B second round of funding in just 90 days
SystemVerilog explained at Santa Clara symposium
(November 2003)
Accellera is to host a SystemVerilog symposium and vendor fair on Thursday 4th December 2003 in Santa Clara, California
Physical synthesis aids structured ASIC design
(October 2003)
NEC Electronics and Synplicity are expanding their joint development and marketing agreement
Equity funding to finance further growth
(July 2003)
Monterey Design Systems has received $10 million in new equity funding
Customer support certified again
(July 2003)
The Mentor Graphics Customer Support Division has been certified for the fourth straight year under the prestigious Support Center Practices (SCP) certification programme
Faster route to ASIC prototyping
(February 2003)
Synplicity has enhanced its Certify verification synthesis software to ease the ASIC prototyping process and improve quality of results
Cadence selected as prime EDA vendor
(September 2002)
Austria Microsystems has qualified Cadence analogue/mixed-signal solutions as a reference flow
Hardware verification takes on new Intel spec
(April 2002)
Synopsys has released OpenVera 2.0, with new additions to OpenVera assertions based on Intel's ForSpec language
Design flow speeds programmable SoC solutions
(April 2002)
Mentor Graphics and Atmel have developed a comprehensive design flow for Atmel's award winning programmable SoC solutions
Cadence opens up third-party development
(February 2002)
The OpenAccess Coalition has released the OpenAccess source code roadmap, and announced OpenConnect, a programme to encourage third-party development with OpenAccess
Mentor holds Scotland and Ireland Designer Forum
(May 2001)
Mentor Graphics is inviting engineers North of the border to attend the first Mentor Graphics Scotland and Ireland Designer Forum, cosponsored by Xilinx, on Tuesday 5th June 2001