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"FPGA synthesis"...

Laurence Marchini

Laurence Marchini, Editor, writes:
 

We see from your search that you're looking for information on the term "FPGA synthesis", and we have a large number of manufacturers' news releases and technical articles here on Electronicstalk which will be of interest. Let me be your guide.
 
Start with the news release Equivalence checker is made for the FPGA market from OneSpin Solutions, which we summarised at the time by saying "Tool verifies functional equivalence between the RTL code and post-synthesis FPGA netlist, and between the post-synthesis netlist and post-place-and-route FPGA netlist". A couple of weeks before, we featured the news release FPGA synthesis accepts VHDL and Verilog from Mentor Graphics UK: "Simulink HDL Coder and Precision Synthesis provide a rapid path from Simulink models to FPGA implementation".
 
In September 2007, we covered the news from Synplicity concerning its HAPS-51 - take a look at ASIC prototyping board boasts biggest FPGA which says: "System provides a cost-effective, high-performance prototyping solution that reduces development time for today's challenging SoC designs".
 
Take a look also at the news release from ARM, Reference methodology eases Cortex-M1 design, as well as Synthesis software support for new FPGAs from Synplicity, and Processor is first specifically for FPGAs from ARM.
 

See also:

Support for Xilinx Spartan-3A devices (December 2006)
Synplicity has announced that its Synplify Pro FPGA synthesis software provides optimal support for Xilinx new low-cost, high-volume Spartan-3A family of I/O-optimised FPGAs

Synthesis tool supports Stratix III (November 2006)
Blast FPGA, Magma's industry-leading synthesis tool for programmable logic, is solidifying its entry into the FPGA synthesis market by providing support for the new 65nm Stratix III FPGA family

FPGAs raise performance but cut power (November 2006)
The Stratix III FPGA family is claimed to deliver the industry's lowest power consumption of any high-density, high-performance programmable logic device

Synthesis software is optimised for Stratix III (November 2006)
Synplicity has upgraded its industry-leading Synplify Pro FPGA synthesis and Synplify DSP true DSP Synthesis software to support Altera Corp's new low-power, high-performance Stratix III FPGAs

FPGA tools to support multigigahertz devices (October 2006)
Synplicity has signed a multiyear development and OEM agreement with Achronix Semiconductor Corp to provide critical EDA technology for Achronix multigigahertz FPGAs

Multi-year OEM agreement with Eve (July 2006)
Synplicity has signed a multi-year OEM agreement with Eve pursuant to which Synplicity will provide Eve's customers with access to Synplicity's industry-leading FPGA synthesis technology

SoC simulator supports IP encryption (July 2006)
Aldec is providing support for the Open IP Encryption Initiative design flow in the latest version of its Riviera tool

Development environment adds more tools (May 2006)
Actel has obtained the right to distribute the Synplify Pro, Identify and Synplify DSP software solutions to its customers as part of its Libero integrated design environment

Dev kit gets FPGA designs right before synthesis (February 2006)
New diagnostics and optimisation features allow users to shorten development times by troubleshooting, debugging and optimising Mitrion processor designs before FPGA synthesis

Software agreement speeds FPGA design support (December 2005)
A new OEM agreement gives FPGA designers access to a range of performance and productivity benefits using Precision Synthesis within the QuickLogic QuickWorks environment

Graph-based synthesis speeds FPGA design (October 2005)
Synplicity has expanded its Synplify family of FPGA synthesis tools to address the design challenges presented by today's complex FPGA devices

Software adds C-based FPGA design input (August 2005)
CoDeveloper C-to-FPGA tools from Impulse Accelerated Technologies can now be integrated with advanced FPGA synthesis and verification tools from Synplicity

FPGA design suite gets to grips with timing (July 2005)
A new integrated design environment integrates best-in-class design tools to enable FPGA designers to achieve the highest results in terms of quality, efficiency and functionality

Alliance aims to enhance FPGA performance (April 2005)
Lattice Semiconductor Corp and Synplicity are working together to enhance and promote Lattice FPGA device performance in Synplicity's Synplify Pro FPGA synthesis tool

Prototyping family extends to single-chip designs (April 2005)
Synplify Proto is the first prototyping tool to address the need for single FPGA prototyping by integrating logic synthesis with debugging capabilities

FPGA synthesis gains equivalence checking (January 2005)
Synplicity and Prover Technology have developed an integrated verification flow for Synplicity's Synplify Pro advanced FPGA synthesis product

FPGA software supports switch to structured ASICs (January 2005)
Synplicity's FPGA synthesis products now support Altera's new HardCopy II device family

FPGA software supports new low-cost Flash devices (January 2005)
Synplify and Synplify Pro now provide optimised support for the new low-cost Actel ProASIC3 and ProASIC3E device families

FPGA synthesis boasts boost to productivity (January 2005)
Synplicity has unveiled major enhancements to its industry-leading FPGA synthesis software

Interface streamlines FPGA design flow (November 2004)
Aldec and Magma Design Automation have completed the design flow interface between Active-HDL 6.3 and Palace version 2.4

Improved verification boosts tapeout confidence (November 2004)
Cadence Design Systems has made substantial enhancements to its market-leading Encounter Conformal technology

Haines returns to VP role (October 2004)
Andrew Haines has rejoined Synplicity to lead the company's worldwide marketing team as Vice President of Marketing

FPGA software extends to latest Xilinx devices (October 2004)
Design Compiler FPGA now supports the Xilinx Virtex-4 family of domain optimised FPGAs and ISE 6.3i place and route software

Design tools allow high-performance C compiling (September 2004)
The newest edition of Impulse's CoDeveloper C to RTL design tools allows FPGA users to compile C to Altera's highest-performance programmable platforms

C to RTL tools support design software (September 2004)
CoDeveloper makes it possible to describe, debug and test mixed hardware/software applications using standard C development tools such as Visual Studio and GCC/GDB

Synthesis tools support Virtex-4 FPGAs (September 2004)
The Mentor Graphics suite of advanced synthesis products will support the newly introduced Virtex-4 field-programmable gate arrays (FPGAs) from Xilinx

FPGA synthesis software comes up to date (September 2004)
Synplicity has released new versions of its FPGA synthesis and physical synthesis software solutions

Software tests and compiles C applications (August 2004)
Impulse's CoDeveloper makes it possible to describe, test and compile C language applications

Affordable acceleration for RTL verification (July 2004)
Riviera-IPT Desktop brings Aldec's acceleration technology to the mainstream EDA market

Software cuts complex FPGA problems down to size (June 2004)
The latest versions of Synplify FPGA synthesis and Amplify FPGA physical synthesis software claim significant quality of results improvements for complex FPGA devices

FPGA synthesis answers prototyping challenge (March 2004)
Design Compiler FPGA (DC FPGA) is a new FPGA synthesis product for designers who prototype ASICs using high-end FPGAs

FPGA software improves Xilinx quality of results (February 2004)
Synplicity has enhanced its FPGA synthesis and physical synthesis software to provide optimised support for the latest version of Xilinx's Integrated Software Environment (ISE)

FPGA software exploits latest device features (February 2004)
Synplicity has enhanced its Amplify FPGA physical synthesis and Synplify Pro FPGA synthesis software to include new support for Altera and Xilinx devices

Predictive analysis aids pre-siilcon prototyping (December 2003)
Atrenta and Aptix have developed a set of RTL coding rules for pre-silicon prototyping that ensure efficient mapping to Aptix's multi-FPGA prototyping platform

 

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