Laurence Marchini, Editor, writes:
We see from your search that you're looking for information on the term "Hardware Description Language",
and we have a large number of manufacturers' news releases and technical articles here on Electronicstalk which will be of interest.
Let me be your guide.
Start with
the news release ADCs and FPGA enhance multiband transceiver from
Pentek, which we summarised at the time by saying "Pentek has significantly boosted analogue performance in the Model 7141 so that the signal-to-noise ratio and the spurious free dynamic range are improved".
A few weeks before,
we featured the news release FPGA synthesis accepts VHDL and Verilog from
Mentor Graphics UK: "Simulink HDL Coder and Precision Synthesis provide a rapid path from Simulink models to FPGA implementation".
In April 2007, we covered the news from Emulation and Verification Engineering (EVE)
concerning its ZeBu-AX
- take a look at Hardware accelerator offers huge capacity
which says: "EVE's ZeBu-AX offers plug-and-play, event-accurate mixed-language simulation acceleration".
Take a look also at the news release from Pentek, Software radio module is conduction cooled,
as well as Cosimulation link aids functional verification from MathWorks,
and FPGA coprocessor speeds HyperTransport design from Celoxica.
See also:
Coder provides link from system model to device
(September 2006)
The Simulink HDL Coder automatically generates synthesisable hardware description language code from models created in Simulink and Stateflow software
Mentor supports Russian education
(April 2006)
Mentor Graphics has sponsored a new electronic design laboratory at the Moscow Institute of Electronic Technology (MIET) in Zelenograd, Russia
SystemVerilog support covers full design chain
(March 2006)
Synopsys now supports the SystemVerilog language throughout its suite of design and verification products, extending its SystemVerilog leadership and establishing another industry-first achievement
Novel route to personalised processing
(June 2005)
Corxpert technology automates the path for software developers to develop custom instructions to improve processor performance, creating differentiated products
PMC hosts complete software radio transceiver
(March 2005)
Pentek has released a complete software radio transceiver module suitable for connection to IF or RF ports of a communication system
Interface links HDL with OpenAccess
(March 2005)
Verific Design Automation has developed an interface between its hardware description language (HDL) Component Software and the OpenAccess database
Silicon Navigator signs up for HDL
(March 2005)
Silicon Navigator Corp has licensed its hardware description language (HDL) Component Software from Verific Design Automation
IDE takes on latest budget Flash FPGA designs
(January 2005)
Actel's new Libero 6.1 integrated design environment (IDE) provides complete support for the company's new Flash-based ProASIC3 and ProASIC3E devices
Futuristic platform for automotive electronics
(November 2004)
Si-Gate has developed an innovative development platform (Si-Gate X1500) suitable for futuristic automotive electronics applications
Platform gains assertion-based verification
(October 2004)
Cadence has developed a comprehensive assertion-based verification (ABV) solution as a part of its Incisive functional verification platform
Software brings FPGA and PCB design together
(July 2004)
I/O Designer is a new solution that facilitates concurrent chip-to-board design of field-programmable gate arrays and the PCB
Verification accelerator supports System C
(April 2004)
An updated version of the VStation TBX verification accelerator delivers full support for the leading system design languages
Learn all about SystemVerilog for free
(January 2004)
Four leaders in advanced design and verification technologies are sponsoring free SystemVerilog technical seminars and product demonstrations in Israel, Germany, the UK and Japan
FPGA software moves to a new level
(July 2003)
The latest version of FPGA Advantage features a new design cockpit that integrates recent updates to the HDL Designer Series, ModelSim and Precision RTL Synthesis products
Software evolves to more complex designs
(July 2003)
HDL Designer Series 2003.1 is the latest version of the industry-leading environment for the creation, development and management of complex ASIC and FPGA semiconductor designs
Platform tackles Australian ASIC bugs
(May 2003)
Canon Information System Research of Australia has chosen the ZeBu verification platform to verify and debug a new line of ASICs
Reconfigurable DSPs boost wireless infrastructure
(March 2003)
Motorola has demonstrated advanced development tools and new silicon based on reconfigurable compute fabric (RCF) technology at its Smart Networks Developer Forum in Dallas, Texas
ModelSim achieves Verilog/mixed HDL sign-off
(October 2002)
The Model Technology ModelSim hardware description language (HDL) simulation tool has achieved Verilog/mixed HDL sign-off quality at Austriamicrosystems
Simulator has high-speed boards covered all ways
(October 2002)
Version 3.0 of the ICX signal integrity solution is the first PCB signal integrity tool to support Spice, IBIS and VHDL-AMS in a single simulation environment
Synopsys to acquire Co-Design Automation
(August 2002)
Synopsys has signed a definitive agreement to acquire all outstanding shares of Co-Design Automation
Software helps in Verilog training course
(August 2002)
Special editions of the Mentor Graphics ModelSim simulator and LeonardoSpectrum synthesis tools are to be included in a new self-study programme for learning PLD design and Verilog
Verification suite checks up on new PCI-X designs
(August 2002)
The PCI-X 2.0 verification suite comprises the first commercial verification intellectual property (IP) for designs incorporating the newly released PCI-X 2.0 specification
Automotive developer switches to DK1
(August 2002)
Leading electronic automotive systems developer Compact Dynamics has adopted Celoxica's DK1 design suite
Verilog extension adds behavioural design
(July 2002)
SystemVerilog 3.0 has been approved as an Accellera standard
Interface-based design simplifies IC interconnects
(April 2002)
The latest release of the HDL Designer Series tool suite from Mentor Graphics offers productivity enhancements including an improved interconnect table
Verification library supports VHDL
(March 2002)
Verplex Systems has expanded its Open Verification Library (OVL) to include support for the VHSIC hardware description language (VHDL)
STMicroelectronics signs off ModelSim
(March 2002)
The ModelSim hardware description language (HDL) simulation tool from Mentor Graphics subsidiary Model Technology has achieved Verilog sign-off status with STMicroelectronics
Simulator spans from concept to implementation
(February 2002)
Synopsys has added a commercial SystemC simulator to its latest CoCentric System Studio release
Design and verification path from C++ to PLDs
(November 2001)
Synplicity and Forte Design Systems have announced the availability of the industry's first complete design and verification path from C++ to programmable logic implementation
Latest Verilog standard released
(October 2001)
IEEE 1364-2001, the Verilog hardware description language (HDL) standard, also known as Verilog-2001, was approved by the IEEE as a revised standard in March of this year
Hitachi signs-off ModelSim simulator
(October 2001)
The ModelSim hardware description language (HDL) simulator from Mentor Graphics subsidiary Model Technology has received Verilog sign-off from Hitachi
Formal verification just got faster
(September 2001)
Verplex Systems has announced its next generation Conformal Logic Equivalence Checker
IP runs on ARC core to provide futureproof audio
(August 2001)
Fraunhofer IIS has developed the first IP solution for audio applications such as MP3 and AAC from a single source that is foundry independent and can be adapted for future audio standards
Verplex seeks acceptance for OVL library
(June 2001)
Verplex Systems has contributed its Open Verification Language (OVL) library to electronics industry standards organisation Accellera