Laurence Marchini, Editor, writes:
We see from your search that you're looking for information on the term "Memory controller",
and we have a large number of manufacturers' news releases and technical articles here on Electronicstalk which will be of interest.
Let me be your guide.
Start with
the news release cPCI board toughens up for space duties from
Aitech Defense Systems, which we summarised at the time by saying "The S950 offers extreme protection against single event upsets, making it ideal for a variety of low earth orbit, Mars terrestrial and geocentric orbit applications".
A couple of weeks before,
we featured the news release IP integration provides bandwidth for digital TV from
Synopsys: "The integration of the DesignWare DDR Protocol Controller IP and the Arteris NoC solution provide designers with memory traffic bandwidth and quality of service".
In January 2008, we covered the news from Intelliam
concerning its LeanStor
- take a look at Solid state memory provides new mounting options
which says: "LeanStor has no mechanical seek or rotation latency and no moving parts, providing superior ruggedness in harsh environments".
Take a look also at the news release from Rambus, Memory architecture boosts bandwidth for TV,
as well as Board cuts power for data-intensive processing from Concurrent Technologies,
and SBCs are powerful, durable and versatile from Diamond Point International (Europe).
See also:
Single-host board eliminates bottleneck
(November 2007)
American Portwell Technologies' ROBO-8913VG2AR single-host board suits applications such as image processing, chemistry analysis and flight simulation
Computers meet military needs
(October 2007)
Aitech Defense Systems' C108 SBC reduces heat generation for increased reliability, while its pin compatibility reduces upgrade, operating and maintenance and logistics expenses
System controller boosts performance
(October 2007)
Based on Marvell's system controller architecture, Discovery VI incorporates an innovative crossbar architecture, advanced I/O peripherals and optimised interfaces
News on the Rambus DDR3 memory controller interface cell from Rambus
(October 2007)
The Rambus DDR3 memory controller interface cell is designed to accommodate applications including PC main memory, consumer electronics, servers, workstations and network communications
Dynamic RAM claims industry speed record
(October 2007)
The latest addition to the XDR DRAM family provides an industry-leading data transfer rate of 9.6Gbyte/s with a single device
Memory PHY reduces LSI design risks
(September 2007)
DDR2 SDRAM PHY design can be prototyped on the Xilinx Virtex-5 FPGA before progressing to Tokyo Electron Device ASICs
CPU card offers high-speed stability
(September 2007)
The IB940 uses the latest Intel Q965 chipset to support Intel's Core2 Duo processors
Connectivity platforms boost IP security
(August 2007)
Security functions including AES encryption, enhance design flexibility for handheld electronics products
Acquisition expands IP portfolio
(August 2007)
Application specific IP expands products and services for the rapid development of system-on-chip integrated circuits
Industrial-spec board has graphical edge
(August 2007)
Full-size slot CPU board is a high performance industrial computing platform with integrated graphics, ideal for entertainment and public information markets
Dual-processor SBC improves performance
(July 2007)
The PP 402/04x uses the latest mobile dual core processors from the Intel embedded roadmap, ranging from the 1.5GHz to the 2.16GHz Intel Core 2 Duo processor
Memory controller IP cuts Flash system costs
(July 2007)
Next-generation high-speed BCH error correction code technology for NAND Flash memory claims order-of-magnitude performance improvement at lower costs
Acquisition to expand IP portfolio to DDR
(July 2007)
Synopsys is set to acquire the semiconductor IP assets of Mosaid Technologies, and will integrate these into its DesignWare IP portfolio
Memory IP keeps speed with projector chips
(June 2007)
Texas Instruments has used the Rambus XDR memory architecture in its DLP integrated circuits
Quad-core blade powers comms infrastructure
(June 2007)
ATCA server blade is powered by a pair of dual-core Intel Xeon processors
Pentium power for 3U cPCI SBCs
(June 2007)
A low-power 3U CompactPCI SBC supports the 1.4GHz Intel Pentium M processor LV 738 in harsh operating environments
Memory controller enables high-speed networking
(May 2007)
BroadLight has used Databahn DDR memory controller IP in a wide range of end product designs, including high-speed networking applications
Buffer cuts FB-DIMM power budgets
(May 2007)
Third generation memory buffer family offers the lowest power consumption available in the industry today - up to 40% power savings over competing AMB offerings
Compact CPU is made for mobile applications
(April 2007)
Half-size PISA CPU card incorporates the Mobile Intel 945GM Express chipset for embedded computing
DDR memory used on multimedia chip
(April 2007)
Denali's Databahn memory system solution helps ODM's developers rapidly deploy mobile DDR memory systems in their chip for use in portable products
Memory subsystem marries Flash and RAM benefits
(March 2007)
Revolutionary memory subsystem blends key benefits of NOR, NAND and RAM in a unified architecture
FPGAs have DDR interfaces to synchronous DRAM
(March 2007)
FPGA's Double Data Rate 2 (DDR2) Synchronous DRAM memory interfaces operate at 533Mbit/s
Memory designer sees revenues and profits grow
(February 2007)
Semiconductor designer announces financial results for the third quarter of fiscal 2007, ended January 31, 2007
Mobile DDR memory-controller IP used in SoC design
(February 2007)
Global Unichip, a leading system-on-a-chip (SoC) design foundry, has used Denali Software's Databahn mobile DDR memory-controller IP and PHY in a wide range of its end-product designs
Mezzanine card for embedded high performance
(February 2007)
Kontron launched at 3GSM World Congress a Mid-Size Advanced Mezzanine Card (AMC) with Intel multicore processor technology, generating several new design options for compute-intensive applications
FPGAs provide interface to NAND Flash
(February 2007)
NAND Flash solution interfaces with a host of application processors used in portable applications, such as the Marvell PXA2xx applications processor and Analog Devices' Blackfin DSP
Structured ASICs add PCIe and DDR2 interfaces
(February 2007)
Two new high-speed interfaces are available for eASIC's 90nm Nextreme structured ASIC family: a PCI Express (PCIe) endpoint controller and a DDR2 memory controller
Development support for NXP microcontrollers
(February 2007)
Hitex offers debug and application support for NXP's new LPC2300/2400 microcontroller family
Seminars explain SoC memory designs
(February 2007)
Technical seminars address techniques for designing today's DDR2 SDRAMs into SoC applications, and the future for DDR3 memories
Specification aims to improve DDR memory designs
(January 2007)
Denali Software has announced the release of the DFI specification version 1.0, on behalf of all DDR PHY Interface (DFI) specification participating members
ATX motherboard hosts Virtex-4 development
(January 2007)
Xilinx has announced immediate availability of its lead-free, RoHS compliant ML410 development platform
Memory controller and PLL IP move down to 65nm
(January 2007)
Mosaid has released the industry's first complete DDR SDRAM controller and interface IP, as well as fractional PLL IP, in leading 65nm process technology
6U Xeon board is scalable multiprocessing platform
(January 2007)
Thales has unveiled its PENTXM4, a twin dual-core Intel Xeon ULV processor version of its popular PENTXM2
DDR PHY spec makes awards shortlist
(January 2007)
The recently announced DDR PHY Interface (DFI) specification has been selected among the finalists for the coveted DesignVision Award in the Interconnect Technologies and Components category