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"Memory subsystem"...

Laurence Marchini

Laurence Marchini, Editor, writes:
 

We see from your search that you're looking for information on the term "Memory subsystem", and we have a large number of manufacturers' news releases and technical articles here on Electronicstalk which will be of interest. Let me be your guide.
 
Start with the news release Embedded Linux board comes with small claims from Hectronic, which we summarised at the time by saying "The Hectronic H6043 is billed as the smallest Linux computer available today". A few weeks before, we featured the news release Debug package eases customised testing from Wind River Systems: "Hardware diagnostics combine on-chip debugging-based development solutions with specific test and manufacturing tooling, all integrated with the National Instruments LabView platform".
 
In July 2007, we covered the news from Silicon Storage Technology concerning its SST88VP1107 - take a look at Memory technologies come together which says: "NOR, NAND and RAM combine in a single-bus single-package solution that offers a completely managed memory subsystem in a 10 x 13 x 1.4mm LBGA package".
 
Take a look also at the news release from IDT, Buffer cuts FB-DIMM power budgets, as well as Memory subsystem marries Flash and RAM benefits from Silicon Storage Technology, and Software takes holistic view of SoC power drain from Tensilica.
 

See also:

Flash memory modules add security to handsets (February 2007)
MirrorBit solutions protected by Spansion Secure technology provide the highest level of commercially available protection with hardware-based encryption for mobile handsets

NXP device stars in Flash MCU benchmarks (November 2006)
Benchmark scores provide striking indication of the impact of embedded high-speed Flash memory design on device performance and the differences among ARM7-based devices

Memory compilers integrate test and repair (October 2006)
Embedded memory test and repair system is tightly integrated with the ARM Advantage and Metro memory compilers

IP library supports MeP design (October 2006)
CoWare is collaborating with Toshiba in the development of a range of next generation MeP platforms

Clock generator keeps XDR DRAMs on time (August 2006)
Rambus has announced the latest version of its XDR clock generator (XCG), revision 1.0, a clocking solution that provides the necessary clock signals to support XDR memory systems

COM Express module upgrades legacy 5V boards (February 2006)
The Procelerant CE 945GM is one of the industry's first COM Express modules to use the Mobile Intel 945GM Express chipset and the only module available today with 5V support

Transaction-level modelling enables design re-use (January 2006)
CoWare has announced a new standards-based modelling solution for platform-driven ESL design with the new release of CoWare ConvergenSC

News on the Common Flash memory subsystem from Intel Corporation (December 2005)
A common Flash memory subsystem will lower development costs for handset OEMs and enable them to get to market faster with feature-rich phones

Benchmarks to focus on network storage performance (November 2005)
A new suite of benchmark tests will be the first of their kind to help predict the performance of CPU subsystems in storage applications

Audio DSPs waltz through multichannel decoding (September 2005)
The next generation in the Aureus family of audio digital signal processors is ideal for applications requiring audio decoding and simultaneous high-speed encoding

Packard Bell adopts DVD processor (August 2005)
Packard Bell is using LSI Logic's second-generation DoMiNo 8602 (DMN-8602) DVD recorder system processor for its growing line of DVD recorders

Waveform digitisers reduce waiting time (April 2005)
The ATS460 family of 14bit PCI waveform digitisers is capable of sampling two simultaneous analogue inputs at rates up to 125Msample/s on each channel

Tutorial to explain DDR/DDR2 memories (March 2005)
Inphi Corp is to present a DDR/DDR2 tutorial in conjunction with Samsung Semiconductor on both Thursday 31st March and Friday 1st April at the JEDEX Conference in San Jose, California

SystemC-based models speed ZSP design (October 2004)
CoWare and LSI Logic have developed ZSP SystemC-based models for use with the CoWare ConvergenSC design environment

Systems engineering spans the globe (October 2004)
Spansion has expanded its system engineering capabilities across seven global locations, in line with its strategy to bring higher value to the marketplace and to its customers

Multicore processor optimised for network services (September 2004)
Cavium Networks has introduced the industry's first single-chip network services processor (NSP) family for secure, Layer 3 to Layer 7 networking applications

Baseband modem macro runs on a single FPGA (July 2004)
CBEmacro is a complete baseband modem design aimed at enabling chip manufacturers to incorporate cellular communications technology into their products

New flow speeds 62-million-transistor to tape-out (July 2004)
Cadence has provided a complete back-end design flow for one of Motorola's most complex chips, incorporating more than 62 million transistors

Support packages bring SystemC to MIPS designs (July 2004)
SystemC-based processor support packages (PSPs) for the MIPS32 24K core family have been added to CoWare's extensive ConvergenSC Model Library

System components accelerate SoC throughput (June 2004)
Three new products support ARM11 family-class processors that use the Amba AXI interface specification

Memory roadmaps show the way ahead (May 2004)
Toshiba has revealed its latest strategic roadmaps for the memory market

Top-performing 32bit cores released to market (April 2004)
The highest performing 32bit synthesisable processor core family in the embedded market has been released for general availability and licensing by OEMs and semiconductor companies

Cache controller cuts processor power drain (February 2004)
When combined with an ARM processor, the ARM L210 Level 2 cache controller has the potential to increase performance by between 25 and 75%, extending battery life and reducing memory cost

Software optimises C code performance (January 2004)
CoWare is partnering with startup PowerEscape to distribute its power optimisation software

Design tool licence enables Silicon Valley startup (January 2004)
IMEC has spun-out its low power design tool technology for data and memory optimisation to Silicon Valley startup PowerEscape

DVD recorder processor powers Samsung combo (January 2004)
LSI Logic's second-generation DiMeNsion 8602 (DMN-8602) DVD recorder system processor is designed into Samsung's line of combination VHS/DVD recorder products

First support package for 64bit core (January 2004)
The first SystemC-based processor support package for the MIPS64 25Kf core has been added to CoWare's extensive ConvergenSC Model Library

DVD recorder chip integrates more functions (December 2003)
LSI Logic has developed a second-generation, single-chip DVD recorder system processor based on its successful and field-proven Domino architecture

World's first claim for single-chip switch (July 2003)
Fujitsu Laboratories of America has developed the industry's first 10Gbit/s Ethernet switch chip developed for layer-2 functions in high-performance server designs

Microarchitecture aims for SoC dominance (June 2003)
A new high-performance microarchitecture aims to address the changing economics of SoC design and help engineers increase profitability by extending their products' lifecycles

Processor module boosts power by 40% (February 2003)
The PrPMC610 is a low power processor PMC (PrPMC) module heralded as a cost effective way to provide up to 40% more processing power over the previous generation PrPMC600 module

Processor PMC module includes security coprocessor (November 2002)
The PrPMC815 is the fastest Processor PMC module to date from Motorola Computer Group

Kits speed DSP memory subsystem design (November 2002)
Abacus has two different development kits that each enable DSP engineers to build a core DSP design in two chips

Module first with IXC1100 control plane processor (September 2002)
The PrPMC1100 is the first processor PCI mezzanine card (PrPMC) designed for the recently announced Intel IXC1100 control plane processor

 

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