Laurence Marchini, Editor, writes:
We see from your search that you're looking for information on the term "Reference methodology",
and we have a large number of manufacturers' news releases and technical articles here on Electronicstalk which will be of interest.
Let me be your guide.
Start with
the news release Reference methodologies speed ARM design from
Cadence Design Systems, which we summarised at the time by saying "Methodologies for two ARM processors provide enhanced design solutions to mutual customers designing multicore, low-power devices".
Several months prior to that,
we featured the news release Reference methodology eases Cortex-M1 design from
ARM: "ARM and Synplicity are working together to ensure that mutual customers can successfully implement the ARM processor across a range of FPGA device families".
In October 2006, we covered the news from Cadence Design Systems
concerning its Encounter Reference Methodology
- take a look at Reference methodology aids ARM-based design
which says: "Cadence Design Systems is collaborating with ARM to expand the breadth of their joint reference methodology with the addition of Encounter Test timing and power-aware technology".
Take a look also at the news release from ARC International, Processor configuration tool Encounters support,
as well as Reference methodology covers latest ARM processor from Synopsys,
and Multithreading core aims to cut embedded costs from MIPS Technologies.
See also:
Migration service smoothes way to SystemVerilog
(December 2005)
Applied Micro Circuits Corp has adopted SystemVerilog for testbench automation using Synopsys' VCS comprehensive RTL verification solution
Design flow supports latest ARM processor
(October 2005)
Cadence Design Systems has developed a high-performance design flow for the new ARM Cortex-A8 processor
ARM kits shorten time to productivity
(September 2005)
Cadence Design Systems and ARM have extended their design chain alliance to deliver further benefits to their mutual customers
SoC reference methodology cuts the power
(April 2005)
Magma Design Automation and ARM have developed a complete RTL-to-GDSII, low-power implementation solution for system-on-chip designs
Configurable core gains reference methodology
(January 2005)
Magma Design Automation and ARC International have developed a validated reference methodology for the ARC 600 configurable microprocessor core
Cores gain validated reference methodology
(September 2004)
Magma Design Automation and MIPS Technologies have developed a validated reference methodology for the high-performance MIPS32 24K microprocessor core family
Reference methodology supports speedy new cores
(April 2004)
Cadence Design Systems and MIPS Technologies have developed an optimised MIPS-Cadence Encounter Reference Methodology for customers of MIPS32 24K cores
Top-performing 32bit cores released to market
(April 2004)
The highest performing 32bit synthesisable processor core family in the embedded market has been released for general availability and licensing by OEMs and semiconductor companies
Reference flow supports top-performing core
(April 2004)
A Galaxy design platform reference flow is now available for MIPS Technologies' new high-performance 24K microprocessor core family
Cores are ready for Magma reference implementation
(February 2004)
Magma Design Automation and ARM have developed a reference methodology for RTL-to-GDSII implementation of SoCs that include cores from the ARM9E family of microprocessors
Manual to standardise SystemVerilog verification
(February 2004)
Synopsys and ARM are jointly developing a reference methodology to define a coverage-driven verification architecture using SystemVerilog, the open, industry-standard language
Compiler synthesis boosts reference methodology
(February 2004)
A new upgraded ARM-Cadence Encounter reference methodology now incorporates Encounter RTL Compiler synthesis
New cores power platform for trusted computing
(October 2003)
Two new ARM11 family microprocessors, the ARM1176JZ-S and the ARM1176JZF-S cores, power a new version of the ARM11 core family-based PrimeXsys Platform
CPUs lead core family performance
(October 2003)
The ARM1156T2-S and ARM1156T2F-S cores are based on the ARMv6 instruction set architecture and are aimed at a wide range of deeply embedded storage, automotive networking and imaging applications
News on the ARM-Synopsys Reference Methodology from Synopsys
(September 2003)
The ARM-Synopsys Reference Methodology, first introduced in 2001, now supports Galaxy SI, a comprehensive signal integrity (SI) solution within the Galaxy Design Platform
Reference methodology speeds the ARM design race
(March 2003)
The ARM-Synopsys Reference Methodology is a new integral part of all ARM synthesisable cores
Test solution aids core-based design development
(March 2003)
Synopsys has added a comprehensive test automation solution for core-based designs to its DFT Compiler, a key component of the Galaxy design platform
Service firms up on soft IP cores
(June 2002)
A new design service will allow licensees of ARM IP cores to combine the advantages of 'soft' IP with the performance, predictability and time-to-market benefits of 'hard' IP
SoC integration methodology speeds ARM trade
(May 2002)
ARM, Synopsys and TSMC have collaborated in generating a proven, fast-track SoC integration methodology for use by ARM partners who use TSMC as a foundry
RTL performance prototyping characterises soft IP
(May 2002)
Synopsys has introduced an RTL performance prototyping (RPP) flow using Physical Compiler for IP providers and IP integrators