‘Rtl Synthesis’
An Electronicstalk guide
Start with the news release
IP core implements wide set of peripherals from
Evatronix, which we summarised at the time by saying "Evatronix has released the 80186EC IP core - a 16-bit microprocessor compatible with the 80c186ec chip from Intel and can address a variety of possible applications. ".
Several months prior to that,
we featured the news release Forte to demonstrate synthesis software at event from
Forte Design Systems: "Forte Design Systems is to demonstrate its SystemC high-level synthesis software for hardware and electronic system level (ESL) design at the Electronic Design and Solution Fair on 28-29 January 2010.".
In January 2010, we covered the news from Real Intent
- take a look at Real Intent unveils next-generation lint tool
which says: "Real Intent has announced that it is now shipping Ascent Lint Version 1.2.".
Take a look also at the news release from Tensilica, Tensilica provides design-flow support for DPUs,
as well as Evatronix Nand Flash controller meets ONFi spec from Evatronix,
and Easic enhances Etools software from EASIC.
Latest stories...
Lattice enhances FPGA design tool suite (November 2009)
Lattice Semiconductor has announced Version 8.0 of its ISPLever FPGA design tool suite.
Altera upgrades Quartus II design software (November 2009)
Altera Corporation has released Version 9.1 of the Quartus II software for CPLD, FPGA and Hardcopy application-specific integrated-circuit (ASIC) designs.
Tensilica announces customisable processor (October 2009)
Tensilica has introduced the Xtensa 8 customisable processor, the eighth generation of its low-power dataplane processor cores (DPUs).
Silicon Laboratories expands clock generator range (October 2009)
Silicon Laboratories has expanded its Any-Rate Clock Generator range with the Si5355/56.
Stantronic launches G5100A waveform generator (October 2009)
Stantronic Instruments has introduced the G5100A arbitrary function generator from Picotest.
EASIC in-a-box kits make ASIC design accessible (September 2009)
EASIC has announced the availability of two ASIC-in-a-Box design kits that enable ASIC design to be widely accessible.
Lattice announces FPGA device samples (August 2009)
Lattice Semiconductor Corporation has announced the availability of samples of the Lattice ECP3-150 FPGA.
SynaptiCAD introduces netlist editor and viewer (August 2009)
SynaptiCAD has released Gates-on-the-Fly (GOF): a Verilog netlist editor and incremental schematic viewer.
Further reading
-
RTL synthesis upgrades FPGA design software
Lattice Semiconductor has announced the immediate availability of the Mentor Graphics' Precision RTL synthesis tool for customer use.
-
Faster-running RTL synthesis solution
Design Compiler 2002.05 is the latest and most powerful version of the RTL synthesis solution from Synopsys.
