Laurence Marchini, Editor, writes:
We see from your search that you're looking for information on the term "XAUI",
and we have a large number of manufacturers' news releases and technical articles here on Electronicstalk which will be of interest.
Let me be your guide.
Start with
the news release Backplane transceiver has scope for verification from
Vitesse Semiconductor, which we summarised at the time by saying "Multirate backplane transceiver incorporates the latest clock-data recovery (CDR) techniques and embeds an oscilloscope function into the receiver of input CDR circuits".
A few weeks before,
we featured the news release Gigabit switches enable VME development from
GE Fanuc Embedded Systems: "The rugged GBX24 is designed to meet the demanding requirements of network switching in harsh military/aerospace environments".
In November 2007, we covered the news from Varisys
concerning its VM31 XMC module
- take a look at Modules boost power efficiency
which says: "The VM31 combines a PA6T-1682M with up to 4Gbyte of DDR2 ECC SDRAM and quad Gigabit Ethernet interfaces in a compact PMC/XMC form factor".
Take a look also at the news release from National Semiconductor, LVDS switch suits clock and data switching/routing,
as well as Equalisers extend reach for PCBs and HDMI from National Semiconductor,
and Crosspoint switches run up to 4.25Gbit/s from Texas Instruments (April 2006-).
See also:
Testbench simplifies mixed-signal simulation
(July 2007)
Test bench development and simulation control environment supports all circuit simulation technologies from Synopsys
Active optical cables passed fit for InfiniBand
(July 2007)
Active optical cable assemblies with integrated optical-electrical convertors are certified compliant with the InfiniBand architecture specification
Tool expands high-speed SoC serdes analysis
(July 2007)
Multilane 6.5Gbit/s high-speed interface serdes tester gains sophisticated jitter analysis capability
Modules speed ATCA systems to 10Gbit/s
(June 2007)
AdvancedTCA product portfolio features 10Gbit/s Ethernet interfacing to accelerate IMS and IPTV-oriented application system designs
Software verifies low-power features in new chips
(April 2007)
Software ensures compliance with the widely supported Unified Power Format (UPF) 1.0 Accellera standard
Interoperability to be demonstrated in Anaheim
(March 2007)
Aeluros will be showcase its integrated 10G PHY/serdes/EDC devices at the upcoming OFC/NFOEC exposition in Anaheim, California
FPGAs meet OIF's stringent 6Gbit/s specifications
(March 2007)
The Stratix II GX FPGA meet (OIF) specifications for 6Gbit/s Long Reach and Short Reach communication
Serdes wins product of the year award
(March 2007)
Serdes-based PHYs for PCI Express, SATA and XAUI have been awarded best connectivity intellectual property for 2006
Optical fibre cables link clusters to centre
(February 2007)
ZLynx optical fibre cables connect enterprise data centres and high-performance computer clusters
Scope software assesses XAUI performance
(February 2007)
Electrical performance validation software enables design engineers working on XAUI designs to easily test their devices
Protocol packs ease FPGA applications development
(February 2007)
Xilinx has released protocol packs for PCI Express, Gigabit Ethernet and XAUI for its 65nm Virtex-5 family of FPGAs
Development and debug supports 1682M systems
(February 2007)
The CodeSymphony software development and JTAG debug environment from Corelis will support PA Semi's PA6T-1682M product and PWRficient evaluation kit
Clock buffers run from lower voltages
(January 2007)
New generation of clock products enables very cost effective clock distribution with tight signal integrity requirements for applications such as gigabit Ethernet
Backplane hosts micro-TCA development
(December 2006)
Molex has released a micro-TCA backplane and development chassis to allow developers to build and debug micro-TCA designs before going to production
Analyser optimised for serial-data-based designs
(December 2006)
Agilent Technologies announces an oscilloscope measurement system with specialised tools for designing, debugging and validating designs that include high-data-rate serial buses
Twin-core processor powers up mezzanine card
(October 2006)
The Momentum Series Intel Core Duo-based Advance Mezzanine Card nearly doubles the compute resource available in an AMC form factor
Novel cables pass the 10Gbit/s test
(October 2006)
In September 2006, Belden participated in a full fledged, live demonstration of 10GBase-T technology at Solarflare Communications in Irvine, California
Mixed-signal IP moves to 130nm process
(September 2006)
Connectivity IP is designed for incorporation with Semiconductor Manufacturing International Corporation's 130nm technology
Avago Advances to the Next Generation
(July 2006)
Key Development in Chip Design Extends Deep Heritage of Leading-Edge IP
IBM and Chartered team with Synopsys
(July 2006)
Synopsys USB, PCIe, SATA and XAUI PHYs for high-volume, low-power applications available for foundries' leading-edge processes
Redrivers boost high-speed signal integrity
(June 2006)
Signal conditioning redrivers are designed specifically to manage next generation high-speed protocols like SATA, SAS, XAUI, Fibre Channel and PCI Express
System chip FPGAs gain PCI Express support
(June 2006)
Intellectual property provider Northwest Logic has ported its PCI Express product line, consisting of x1, x4 and x8 IP cores, to LatticeSC (system chip) FPGA devices
Buffer/multiplexers boast best signal integrity
(May 2006)
Four new current-mode logic signal-conditioning buffers and multiplexers feature 25ps of jitter for the best signal integrity in the industry
Embedded serdes channels top 25 million
(January 2006)
Avago Technologies has shipped its 25 millionth embedded serdes channel as part of its ASIC offering for storage, enterprise computing and network equipment manufacturers
QLogic Corp signs for serdes supply
(October 2005)
QLogic Corp has chosen Agere as its system chip supplier for its new 4Gbit/s Fibre Channel application specific integrated circuit and host bus adapter storage area networking solutions
Transceivers are designed for 10Gbit/s networks
(October 2005)
Agilent Technologies is shipping three XFP fibre-optic transceivers that are targeted at 10Gbit/s enterprise, storage and telecommunications networking applications
Software accounts for all sources of signal loss
(August 2005)
HyperLynx 7.5 is the latest version of the powerful and easy-to-implement tool suite for pre- and post-layout signal integrity simulation and analysis
Platform ASICs move to 90nm process technology
(June 2005)
LSI Logic Corporation has announced plans for its next-generation RapidChip platform ASIC families to be manufactured in the company's G90 90nm process technology
Speedy serial PHYs run on 90nm processes
(June 2005)
ARM has released its silicon-verified ARM Artisan Velocity Serial Link 200 PHY (physical layer) Series on leading 90nm process technologies, with immediate effect
Switch takes XAUI port redundancy onboard
(February 2005)
Analog Devices has released the industry's first switching solution designed specifically to address XAUI (10 Gigabit Ethernet Attachment Unit Interface) port redundancy
Scopes speed to handle new serial standards
(February 2005)
Tektronix reckons it has developed the world's fastest, most capable real-time oscilloscopes
Serdes core shrinks to work at 90nm
(January 2005)
Agilent Technologies has validated its third-generation serdes core in a 90nm CMOS process technology
Equaliser compensates for backplane losses
(December 2004)
A new multigigabit analogue equaliser can be used to extend the reach of high-speed switch, router, storage area network and server backplanes
Serdes core is flexible about rates and standards
(October 2004)
The Hydra serialiser/deserialiser (serdes) core offers a wide range of datarates, selectable I/O types, and exceptional design flexibility for fast SoC designs