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Intellectual Property Cores
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System improves multiprocessor flexibility
User application article Using Tensilica allowed the Smart Memory team to focus on creating a flexible memory system that supports many different memory models
News from Tensilica (29 February 2008)
IP core suits varied ASIC systems
SLE's Interlaken IP Core was built to work with off the shelf serdes from most technology vendors.
News from Silicon Logic Engineering (28 February 2008)
Interface IP is optimised for 65nm process
HDMI IP portfolio includes a PHY and digital controller for both transmit and receive applications.
News from MIPS Technologies (22 February 2008)
Embedded soft core processor adds uClinux option
Support allows developers to rapidly implement control systems in a design flow that builds on Lattice's open source embedded solutions approach.
News from Lattice Semiconductor UK (21 February 2008)
Parity check IP is optimised for Xilinx FPGAs
LDPC platform IP powers a family of fully standard and proprietary LDPC solutions such as WiMAX mobile, Wi-Fi-11n, DVB-S2/T2, DTMB and powerline communication.
News from R-Interface (21 February 2008)
Core library is optimised for ASIC prototyping
Users of the Synplicity's HAPS ASIC prototyping system can readily download and synthesise a large set of very advanced and mature IP cores from the GRLIB IP core library.
News from Gaisler Research (18 February 2008)
Samsung signs for audio DSP core
Samsung will use the Diamond Standard 330HiFi audio DSP in mobile handset and other designs.
News from Tensilica (15 February 2008)
New codecs provide format flexibility
The MM2000 supports any existing and future video codec with a simple firmware upgrade to existing silicon.
News from Ceva (11 February 2008)
Image partnership draws on optical research
Silicon Hive will enhance its HiveFlex ISP 2200 processor's instruction set for Apical Imaging's engines, resulting in area and power-efficient silicon designs.
News from Silicon Hive (11 February 2008)
Sleep state cuts USB power consumption
The DesignWare USB LPM IP digital controller and PHY IP implement a new power sleep state to reduce power consumption.
News from Synopsys ( 5 February 2008)
Technology meets 65nm challenges
Faraday Technology's UMC 65nm LL allows users to generate memory options including words, bits and aspect ratios, while retaining the desired area, performance and power specification.
News from Faraday Technology ( 1 February 2008)
API streamlines 2D graphics
Implementing OpenVG using hardware acceleration enables OEMs to deliver smooth, high frame rate interactive performance at very low power levels.
News from Imagination Technologies (31 January 2008)
IP integration provides bandwidth for digital TV
The integration of the DesignWare DDR Protocol Controller IP and the Arteris NoC solution provide designers with memory traffic bandwidth and quality of service.
News from Synopsys (31 January 2008)
IP specialists link academia with industry
New venture will market intellectual property from world leading universities and research institutes to the communications industry.
News from Camitri Technologies (30 January 2008)
Development kit support expands board options
Software developers can choose between the cost-effective Avnet LX60 board and the high-capacity Avnet LX200 board to speed their software design, debug and program optimisation processes.
News from Tensilica (23 January 2008)
Replica transistor celebrates 60th birthday
LSI has donated a replica of the first transistor to the Computer History Museum in Mountain View, California.
News from LSI Europe (22 January 2008)
Free IP core range expanded
Xilinx' 10/100 Ethernet MAC Lite and IIC interface IP cores can now be licensed at no additional charge.
News from Xilinx (16 January 2008)
Programme cuts time and risk for start-ups
The Cadence Start-up Accelerator programme will enable Analogies to focus on developing its high-speed PHY IP cores.
News from Cadence Design Systems (14 January 2008)
Reference deal facilitates high-speed internet
User application article UpZide's solution builds on the existing and continued roll out of FTTN (fibre-to-the-network) VDSL2 deployment by significantly increasing both data rates and reach over the existing copper network.
News from Tensilica (11 January 2008)
Verification IP assures IC interoperability
User application article Denali Software's PureSpec verification IP has helped Staccato Communications find critical bugs in its RTL as well as several bugs in its vendor-supplied RTL IP.
News from Denali Software (10 January 2008)
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