Simulations answer signal integrity issues
PCB design specialist Advanced Layout Solutions has introduced signal integrity analysis as part of its design flow.
PCB design specialist Advanced Layout Solutions (ALS) has introduced signal integrity analysis as part of its design flow.
Using Cadence's AllegroSI and Synopsys's HSpice tools, ALS is able to perform a wide range of board-level simulations to safeguard against high-speed signal integrity issues.
Popular areas of concern for customers are DDR memory interfaces, Xilinx and Altera MGHz serial links and high-speed multidrop buses.
Analysis is offered both as a stand-alone service and as part of the PCB design-flow, and can be carried out on-site.
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