Visit the Lambda web site
Click on the advert above to visit the company web site

Product category: Recruitment, Reports and Resources
News Release from: Accellera
Edited by the Electronicstalk Editorial Team on 25 February 2008

Latest version of VHDL ready for
standardisation

Request your FREE weekly copy of the Electronicstalk email newsletter. News about Recruitment, Reports and Resources and more every issue. Click here for details.

VHDL 4.0 addresses over 90 issues that were discovered during the trial implementation period for the VHDL 3.0 version.

The members and board of Accellera have approved the VHDL 4.0 standard specification VHDL 4.0 is a refinement of VHDL 3.0 (approved by Accellera in October 2006) based on feedback from trial implementations

Accellera has immediate plans to release VHDL 4.0 to the IEEE for balloting in 2008 and to support the IEEE1076-2008 balloting process.

VHDL 4.0 addresses over 90 issues that were discovered during the trial implementation period for the VHDL 3.0 version.

These encompass enhancements to major new areas introduced by VHDL 3.0 including generic types, Intellectual Property (IP) protection, Property Specification Language (PSL) integration, VHPI (VHDL application programming interface (API)) integration, and the introduction of fixed and floating point types.

"We have established an effective process for delivering standards in a timely manner and transferring them to the IEEE", says Shrenik Mehta, Chairman of Accellera.

"The IEEE gave us permission to revise the VHDL language and continue to improve it, thereby addressing the needs of the VHDL community".

Jim Lewis, Chair of the VHDL Analysis and Standards Group (VASG), added: "The VASG has plans in place to bring Accellera's VHDL 4.0 to IEEE for balloting as IEEE1076-2008".

"We are pleased that these VHDL language extensions and productivity enhancements are being standardised for industry adoption with Accellera's support".

"Accellera's efforts to enhance VHDL are continuing", says Lance Thompson, Accellera's VHDL Technical Subcommittee (TSC) Chair.

"Over the past 18 months, Aldec, Cadence Design Systems and Mentor Graphics have created trial implementations, which have helped us clarify the documentation in the areas that were introduced in VHDL 3.0".

"In addition, we've also incorporated issues resolved by the VASG's Issues Screening and Analysis Committee (ISAC)".

The VHDL 4.0 standard is available to Accellera members and Accellera VHDL Technical Subcommittee members.

Accellera: contact details and other news
Email this article to a colleague
Register for the free Electronicstalk email newsletter
Electronicstalk Home Page

Search the Pro-Talk network of sites

Visit the Lambda web site