Product category:
Design and Development Software
News Release from: Actel Europe | Subject: Cadence NC and BuildGates
Edited by the Electronicstalk Editorial
Team on 12 April 2002
FPGAs slip into existing ASIC design
flow
The Cadence NC family of simulators and BuildGates synthesis tool now fully support Actel's new ProASIC Plus family of Flash-based FPGAs.
The Cadence NC family of simulators and BuildGates synthesis tool now fully support Actel's new ProASIC Plus family of Flash-based FPGAs For simulation of ProASIC Plus designs, the NC family of simulators (NC-Sim, NC-Verilog, NC-VHDL and the Verilog Desktop, VHDL Desktop and NC-Sim DeskTop simulators) provides high-performance ASIC simulation tools to verify mixed-language designs, enhance productivity and allow designers to quickly complete the verification cycle
This article was originally published on Electronicstalk on 5 Aug 2008 at 8.00am (UK)
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Actel's fine-grained ProASIC Plus FPGAs allow ASIC designers to leverage their existing Cadence high-end design tools and methodologies, simplifying the FPGA design process", said Rahul Razdan, corporate vice president and general manager of the Cadence Systems and Functional Verification group.
"We are pleased that users of ProASIC Plus, who incorporate the NC family of simulator tools and BuildGates synthesis into their design flow can accelerate time to market and benefit from enhanced capacity, performance and signoff quality results".
"With today's announcement, the architecture and design methodology of the ProASIC family supports best-in-class ASIC tool flows, minimising time to market and permitting designers to migrate easily between FPGA and ASIC solutions", said Bryon Moyer, senior director of tools and technical marketing at Actel.
"Due to a close working relationship with Cadence, our mutual customers can now be confident that their traditional ASIC tools, such as the NC family of simulators and BuildGates, will allow them to quickly and easily develop leading-edge programmable solutions using our ProASIC Plus offerings".
"Because we have an established ASIC design flow, we were reluctant to create an entirely new flow and methodology for FPGA designs", said Reinhard Gottinger, founder of IC-Design, a design services company in Passau, Germany.
"Actel's leading-edge ProASIC devices have allowed us to leverage our proven tools and methodologies, such as NC-Sim and BuildGates from Cadence, resulting in significant savings in time and resources".
The ProASIC Plus family, Actel's second-generation of flash-based FPGAs, consists of six devices ranging in density from 150,000 to 1-million system gates.
The combination of a fine-grained, ASIC-like architecture and nonvolatile Flash configuration memory makes Actel's ProASIC Plus offering a strong ASIC alternative.
The devices are live at power up, highly secure and require no separate configuration memory, all characteristics shared by ASICs.
The ProASIC Plus architecture and design methodology supports popular FPGA and ASIC tool flows, reducing time to market and permitting designers to migrate easily between FPGA and ASIC solutions.
As a result, Cadence customers can easily convert their ProASIC Plus designs to ASICs leveraging their existing NC family of simulators and BuildGates design flow.
New features include multiple phase-locked loops (PLLs), support for up to 198Kbit of two-port embedded SRAM and 712 user-configurable I/Os, and improved in-system programmability.
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