Product category:
Programmable Logic Devices
News Release from: Actel Europe | Subject: RT54SX72S
Edited by the Electronicstalk Editorial
Team on 12 April 2002
Antifuse FPGA beats military radiation
specs
The Actel single-chip "live-at-power-up" 72,000-gate RT54SX72S antifuse FPGA is available now, and has been approved by the Defense Supply Center Columbus (DSSC).
The Actel single-chip "live-at-power-up" 72,000-gate RT54SX72S antifuse FPGA is available now, and has been approved by the Defense Supply Center Columbus (DSSC) The company's RTSX-S family is the industry's first FPGA solution built on a foundation of hardened latches, which eliminates the need for software-based triple module redundancy (TMR) and thus maximises the total number of logic gates available to the designer
This article was originally published on Electronicstalk on 5 Aug 2008 at 8.00am (UK)
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The RTSX-S devices offer total ionising dose (TID) performance in excess of 100krad; inherent single-event latchup (SEL) immunity; better than 63MeV-cm2/mg single-event upset (SEU) performance; and hot-swap compliant I/Os and cold-sparing capabilities.
The RTSX-S family is well suited to radiation-intensive applications, such as low-Earth orbiting satellites and deep space probes.
The new device joins Actel's RT54SX32S, shipped in July 2001, rounding out the RTSX-S family of radiation-tolerant FPGAs specifically architected to address SEUs in space.
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Actel's product portfolio now offers designers a broad range of radiation-tolerant solutions with densities up to 72,000 typical gates, or 36,000 ASIC gates.
The RT54SX72S has been fully characterised for the effects of TID, SEL and SEU.
The RTSX-S family's SEU-hardened latch proved to be impervious to heavy ion upset far beyond the linear energy transfer (LET) threshold goal of 37MeV-cm2/mg; TID performance tested in excess of 100krad; and, consistent with all of Actel's radiation-hardened and radiation-tolerant devices, the RT54SX72S has tested immune to destructive heavy ion-induced SEL effects.
Cold sparing allows the designer to have the device I/Os in a powered state on the system bus while the core of the device is powered down to conserve power.
This functionality is crucial for flight-critical applications, such as command and data subsystems, where device failure is not an option.
Similarly, hot swapping allows system boards to be exchanged while systems are running, or "hot." For systems that run continually, this functionality is beneficial because it allows a board to be inserted or removed without cumbersome power-down/power-up procedures.
The RTSX-S family ranges in density from 32,000 to 72,000 typical gates (16,000 to 36,000 ASIC gates) and offers system performance in excess of 250MHz.
Actel's RTSX-S family is the industry's first FPGA solution built on a foundation of hardened latches, which eliminates the need for TMR.
Traditional FPGAs, which do not use hardened latches, force the user to implement TMR using software or a large portion of the device's programmable logic.
This process of majority voting, or redundancy, means that two-thirds of the density, or available logic, is consumed for redundancy and isn't available for the user's design.
Fully qualified RT54SX72S, MIL-STD 883 Class B and Class S-equivalent "E flow" production quantities are available now in CQ208 and CQ256 packages.
Software support for the RTSX-S family is provided by Actel's Libero integrated design environment.
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