Product category:
Programmable Logic Devices
News Release from: Actel Europe | Subject: ProASIC3 and ProASIC3E families
Edited by the Electronicstalk Editorial
Team on 25 January 2005
Flash FPGAs break the price barrier
The ProASIC3 and ProASIC3E families are Actel's third-generation of Flash-based programmable logic solutions and billed as the world's lowest-cost field-programmable gate arrays.
The ProASIC3 and ProASIC3E families are Actel's third-generation of Flash-based programmable logic solutions and billed as the world's lowest-cost field-programmable gate arrays (FPGAs) With the ProASIC3/E families, Actel addresses strong market demand for full-featured, cost-effective FPGAs for consumer, automotive and other price-sensitive application areas
This article was originally published on Electronicstalk on 5 Aug 2008 at 8.00am (UK)
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"Over the past 10 years, Flash technology has evolved into a disruptive technology, dramatically impacting every application it has touched", said John East, President and CEO of Actel.
"For example, Flash technology has transformed cellphones, cameras and video recorders into revolutionary variants of their predecessors".
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"Flash is now poised to do the same for the programmable logic market".
"Indeed, the paradigm for mainstream FPGA technology platforms has changed forever, and Actel is in a position of leadership".
East continued: "Starting at $1.50, these new ProASIC3 devices represent the world's lowest-cost FPGA solutions while delivering performance and security advantages over comparable SRAM-based products".
"Flash-based FPGAs are now able to provide secure, low-power, live at power-up, reprogrammable solutions that deliver the time-to-market advantages of FPGAs at ASIC-like unit costs, mitigating the need for ASIC migration at higher volumes".
Building on the success of its ProASIC Plus family, Actel's new single-chip devices deliver 64bit, 66MHz PCI performance and are the industry's first FPGAs with on-chip user Flash memory.
The devices range in density from 30,000 to 3-million system gates and deliver technology-leading integrated secure in-system programmability (ISP).
In addition to low unit cost, the new ProASIC3/E families also lower overall system costs by eliminating the need for various components on the system board.
For example, the single-chip devices require no external boot-PROM or microcontroller to support device programming, and the live-at-power-up feature of the ProASIC3/E devices eliminates the need for an external CPLD to get the system running during power-up.
Enabling the use of fewer components reduces board space, which leads to increased reliability, simplified inventory management and lower total system costs.
The ProASIC3/E families provide 1024bit (128 x 8 pages) of on-chip user nonvolatile Flash memory and clock conditioning circuits based on up to six onboard phase-locked loops (PLLs).
The user-accessible, nonvolatile memory can be used for a diverse range of system applications, including Internet Protocol (IP) device addressing, user preference storage, system calibration settings, device serialisation and/or inventory control and date stamping.
The devices also come with up to 504Kbit of embedded true dual-port SRAM and up to 616 user I/Os, offering 66MHz 64bit PCI performance.
Unlike SRAM-based FPGAs, onboard security mechanisms prevent access to all the programming information, and reprogramming can be securely performed in-system, using the industry-standard 128bit AES algorithm to support future design iterations and field upgrades with peace of mind that valuable IP will not be compromised or copied.
The ProASIC3/E families incorporate FlashLock, providing a unique combination of reprogrammability and design security without external overhead.
The built-in decryption engine and Flash-based AES key make the ProASIC3/E families the most comprehensive programmable logic device solutions available today.
In addition, nonvolatile Flash technology gives the ProASIC3/E devices the advantage of being low power and live at power-up.
The ProASIC3/E families achieve nonvolatility and reprogrammability through an industry-leading advanced, Flash-based LVCMOS process with seven metallisation layers - six copper, one aluminium.
Standard CMOS design techniques are used to implement logic and control functions, including the PLLs, resulting in predictable performance.
The combination of fine granularity, enhanced flexible routing resources and abundant Flash switches allows for up to 100% utilisation by even highly congested designs with minimal performance impact.
Samples of the ProASIC3E 600 device are available through Actel's early access programme.
Production quantities are scheduled for Q4 2005.
Pricing for ProASIC3 starts at $1.50, with seven devices under $10 in 250,000-off quantities.
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