Product category:
Design and Development Hardware
News Release from: Advantest (Europe) | Subject: CertiMax
Edited by the Electronicstalk Editorial
Team on 19 July 2002
System speeds SoC debug and
characterisation
CertiMax is a novel silicon validation system for validating complex semiconductors.
Advantest America has revealed further technical details about its new silicon validation system for validating complex semiconductors The CertiMax design validation test system leverages Advantest's leadership in design for test and test-cost reduction to create an innovative approach to testing ever-more complicated ICs
This article was originally published on Electronicstalk on 30 Sep 2002 at 8.00am (UK)
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By allowing design data to be used directly on the validation system without requiring vector or timing translation, CertiMax greatly simplifies the process of functional validation, debug and characterisation.
This can reduce validation time to as little as 30min and significantly speeds time to market for SoCs used in cellular phones, personal digital assistants and other advanced electronic products.
Bob Sauer, president and chief executive officer of Advantest America R and D Centre, said, "Our skilled development team created CertiMax to address the growing challenges associated with testing complex IC designs.
Recognising the pressing need to bring design and test together, we developed an innovative solution that encompasses both the ATE and EDA arenas.
CertiMax uniquely operates in the design environment, and its new architecture enables the extension of this environment from simulation to the physical testing of ICs".
CertiMax's innovative new architecture radically simplifies the entire test process.
Using the validation test system, a chip designer can literally take an industry-standard VCD (Verilog change dump) file from a simulation tool and use it as is, on silicon.
For first-silicon debug and characterisation, this is a major benefit because designers can check device response under multiple versions of simulation test vectors.
The system also provides a direct link from design simulation to testing and eliminates vector cyclisation, conversion or manipulation of the data in any way.
The resultant reduction in validation time and cost (compared with traditional cycle-based methodology) can amount to 90%, depending on the design.
The CertiMax design validation test system begins shipping in July.
Pricing starts at $482,000.
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