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Product category: Design and Development Software
News Release from: Advantest (Europe) | Subject: Certimax
Edited by the Electronicstalk Editorial Team on 30 September 2002

Event-based technology bridges design
gap

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Advantest has unveiled further plans for its new Certimax event-based technology introduced in July at Semicon West 2002.

Advantest has unveiled further plans for its new Certimax event-based technology introduced in July at Semicon West 2002 The event-based technology in the Certimax design validation test system leverages Advantest's leadership in design-for-test technology and test-cost reduction to create an innovative approach for testing ever-more-complicated ICs

With the announcement of the Certimax event-based technology card, this technology will now provide the same benefits for the manufacturing test environment, and will be integrated into the Semiconductor Test Consortium's open-architecture platform.

The Certimax event-based technology greatly simplifies the process of functional validation, debug, characterisation and manufacturing test by allowing design data to be used directly for validation and manufacturing test without requiring vector or timing translation.

Bob Sauer, president and chief executive officer of Advantest America R and D Center said, "As design methodology adopts maturing technology, we will see different hand-off points from design to production.

The event-based technology of Certimax is the first step in a test evolution, which promises to track the needs of the design community closer than ever before.

Design and test have traditionally remained separate and isolated from each other.

This has forced design engineers to face numerous challenges such as complications with the design debug and manufacturing process caused by the need for multiple test benches for simulation and test.

Conversion of test vectors from the design environment to the production environment using traditional cycle-based test methodology is time consuming and prone to error.

Cycle-based testers have inherent limitations due to finite resources-such as time sets, wave groups and timing generators - which can make devices with multiple clock domains untestable.

Certimax's innovative architecture radically simplifies the entire test process.

Using either the Certimax validation test system, or Certimax enabled manufacturing test, a chip designer can literally take an industry-standard VCD file from a simulation tool and use it as is, on silicon.

For first-silicon debug and characterisation, this is a major benefit because designers can check device response under multiple versions of simulation test vectors.

For manufacturing test, Certimax event-based technology provides the benefit of "simulation-direct-to-test", eliminating vector cyclisation, conversion or manipulation of the data in any way.

The Certimax event-based design validation system is available now; the Certimax event-based technology card for the Semiconductor Test Consortium's open-architecture platform is scheduled for release by mid 2003.

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