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ATE Systems
News Release from: Advantest (Europe) | Subject: T5503 memory test system
Edited by the Electronicstalk Editorial
Team on 24 April 2008
Memory test system handles 128 devices
The T5503 tester's semiconductor circuitry makes full use of the latest CMOS technology to achieve greater packaging density.
Advantest has released the T5503 high-throughput memory test system, with a parallel test capability of up to 128 devices The T5503 was developed to address the challenges of high-volume production test of next-generation high-speed DDR3-SDRAM memory
This article was originally published on Electronicstalk on 11 May 2001 at 8.00am (UK)
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Next-generation DDR3-SDRAM has low power consumption through a reduced operating voltage of 1.5V, compared to the DDR2-SDRAM's 1.8V, as well as higher speed and higher volume data processing.
Because of these generational advantages, manufacturers are transitioning to DDR3-SDRAM and it is predicted to be in high demand in a wide variety of fields, ranging from high-end desktop computers to notebook computers and digital consumer electronics.
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The T5503 enables package test of up to 128 DDR3-SDRAM devices simultaneously.
This is double that of the company's previous models, enabling a major reduction in test costs for high-volume production lines.
It also offers maximum test speeds of 3.2Gbit/s and data transmission speeds of over 1Gbit/s, making it an ideal solution for high-volume production testing of DDR3-SDRAM, as well as for GDDR3 and GDDR4.
The tester's semiconductor circuitry makes full use of the latest CMOS technology to achieve greater packaging density, reducing the footprint by approximately 40% over the previous model and to space savings in high-volume production lines.
Power consumption has also been reduced by approximately 45% compared to the system's predecessor, enabling environmentally friendly operation.
Advantest's multistrobe capabilities, introduced in the company's previous model, T5501, have been further enhanced in the T5503.
Supporting source-synchronous test with the use of multistrobe technology that measures the phase difference between data output from the device and the reference clock signal at each clock cycle, the system provides high-speed, high-precision testing.
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