Product category:
Programmable Logic Devices
News Release from: Altera Europe | Subject: EPM1270
Edited by the Electronicstalk Editorial
Team on 22 July 2004
Frugal CPLD leads new generation
Altera has begun shipping the first member of its MAX II device family, the EPM1270.
Altera has begun shipping the first member of its MAX II device family, the EPM1270 Based on Altera's groundbreaking look-up table (LUT)-based CPLD architecture, the MAX II family is half the cost and consumes only one-tenth the power of previous MAX generations, while maintaining the same single-chip, nonvolatile and ease-of-use characteristics of the original MAX series
This article was originally published on Electronicstalk on 27 Jun 2008 at 8.00am (UK)
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In addition, the new family delivers four times the density and more than twice the performance of prior-generation MAX CPLDs.
Engineers designing for high-volume, price-sensitive markets can leverage the MAX II device family's cost and performance advantages to replace more expensive and less flexible low-density ASICs and ASSPs often used for critical system control functions.
"We have received our first MAX II devices and are integrating them into our AN-2000 IB IP DSLAM", said Jerry Soloway, Senior Vice President of Engineering at UTStarcom.
Further reading
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The Stratix IV family has up to 680K logic elements, 2x bigger than Altera's Stratix III family, which currently comprise currently the largest FPGAs on the market.
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Stratix III FPGAs are the industry's first programmable logic devices able to support Gigabit Ethernet SGMII on LVDS pins.
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Increased performance transceivers drive serial interfaces at speeds from 600Mbit/s to 3.125Gbit/s and reduce static power consumption by up to 20%.
"The low cost, high capacity and low power consumption of MAX II devices will enable us to increase the cost-effectiveness of our broadband data service delivery solutions".
"We will be using the MAX II devices we received in our upcoming ExaMax MS media intelligent network platform, which for the first time, enables real-time, multi-user, collaborative HD video and 2k/4k digital film creation and editing within a heterogeneous network environment", said John Ding, PhD, Vice President and Chief Architect of Exavio.
"The rich feature set and user-programmable Flash memory in MAX II devices provides us with the tools to create a truly disruptive technology that will deliver new workflow and network infrastructure efficiencies to the digital media market".
Since its introduction in March 2004, the MAX II device family has experienced strong interest from customers spanning the communications, computing, consumer, industrial and automotive markets.
This high level of early market interest indicates that the MAX II family is well positioned to extend Altera's lead in the CPLD market.
"Altera has led the CPLD market for 15 years because of our ability to deliver a low-cost product that meets our customers' requirements, on time and in the required volumes", said Erik Cleage, Altera's Senior Vice President of Marketing.
"The MAX II family continues our leadership in this category as it gives customers the ability to use a low-cost CPLD in place of higher-cost, or higher-power, ASSPs and standard logic devices".
MAX II devices are supported now by the Quartus II design software, the industry's most advanced design software.
Now featuring a built-in MAX+Plus II software look-and-feel option, MAX+Plus II software users can benefit from the Quartus II software's features without having to learn a new graphical user interface.
Customers can download Altera's no-cost Quartus II Web Edition design software from the Altera website.
A low-cost development kit featuring the EPM1270 will be available for purchase from distributors early in the fourth quarter of 2004 for $150.
The development kit includes a PCI form factor printed circuit board with a 32bit edge connector, programming and USB cables, several demonstration designs, Quartus II Web Edition development software and complete documentation.
The MAX II device family includes four members ranging in density from 240 to 2210 logic elements (LEs).
Low-cost packages are available for the MAX II devices, including 1.0mm FineLine BGA and 0.5-mm thin quad flat pack.
All family members will be available in full production by the first quarter of 2005.
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