Product category:
Design and Development Software
News Release from: Altera Europe | Subject: Quartus II
Edited by the Electronicstalk Editorial
Team on 25 October 2005
Software increases FPGA designer
productivity
The latest version of Altera's Quartus II includes design support for the new Stratix II GX FPGA family and new tools for increasing designer productivity.
Altera Corporation has introduced version 5.1 of its Quartus II design software This latest version includes design support for the new Stratix II GX FPGA family and completes the rollout of two key tools for increasing designer productivity - the PowerPlay technology suite and the Quartus II incremental design flow
This article was originally published on Electronicstalk on 27 May 2008 at 8.00am (UK)
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Software upgrade provides speed boost
Customers using the 8.0 release to design Altera's 65nm Stratix III FPGAs on Windows platforms will see compile times reduced by up to 50%.
Software speeds compiling
A Quartus II software user working with a multiprocessor computer will experience, on average, a 20% reduction in compile times over single-processor computers.
Additional productivity enhancements in Quartus II software version 5.1 include immediate and full licence access to popular premium MegaCore intellectual property (IP) functions and the introduction of an external logic analyser interface.
"In the past two years, the Quartus II worldwide commercial user base has grown more than any other PLD software tool - by 70% in 2004 alone", said Chris Balough, Director of Software and Nios Marketing at Altera.
"The ease-of-use and productivity advantages that Quartus II delivers, in concert with the growing adoption of our programmable logic solutions, is fuelling this growth rate".
Further reading
Low-cost FPGAs released
To immediately start designing with Arria GX devices, customers can use Quartus II design software version 7.1.
FPGA design software doubles productivity
Altera claims its latest software helps designers achieve more than 2x faster compile times and half the memory footprint of the nearest high-end FPGA.
Design and development software for 65nm FPGAs
Quartus II software version 7.0 supports the entire 65nm Cyclone III FPGA family and is available in both subscription and free web editions.
Quartus II software version 5.1 includes features for enabling the highest productivity for programmable logic and structured ASIC designs.
Designers can begin designing now for the entire Stratix II GX family using Quartus II software version 5.1.
With the completion of the PowerPlay technology suite rollout, Quartus II software users now have the industry's most advanced tools for programmable logic power analysis and optimisation.
When compared with Quartus II software version 5.0, the power optimisation features delivered in version 5.1 reduce dynamic power consumption by an average of 20%, and up to 60% in Altera's Stratix II devices.
Additionally, version 5.1 includes a new power optimisation adviser, which complements the area and performance optimisation advisers introduced in Quartus II software version 4.1.
These powerful aids provide users with real-time step-by-step guidance on how to optimise Quartus II software usage for these design dimensions.
Incremental compilation enables designers to segment designs into physical and logical partitions for synthesis and fitting.
With the incremental compilation bottom-up flow introduced in version 5.1, individual engineers can independently develop and optimise functions and then easily aggregate them into a completed design.
This feature complements the top-down block-based flow introduced earlier this year, which allows a designer to preserve the performance of specific blocks while other blocks are undergoing optimisation.
The Altera subscription programme now includes full licences for some of its most popular MegaCore functions, helping designers to reduce design time.
Additionally, both Quartus II software Web Edition and Subscription Edition now contain a set of embedded peripherals previously licensed separately with the Nios II embedded processor.
In addition to using the SignalTap II embedded logic analyser feature, Quartus II designers can employ the new logic analyser interface function to gain visibility of internal FPGA nodes when utilising a logic analyser for board-level debugging.
Both the Subscription Edition and the Web Edition of Quartus II software version 5.1 will be available this week.
The subscription edition will ship to all customers with an active software subscription.
Altera's software subscription programme simplifies the process of obtaining Altera design software by consolidating software products and maintenance charges into one annual subscription payment.
The annual subscription for the Altera design software is $2000 for a node-locked PC licence.
Quartus II Web Edition software can be downloaded for free from the Altera website.
Quartus II design software supports major operating systems, including Windows XP; Windows 2000; Sun Solaris 8 and 9; Red Hat Linux 8.0, and Enterprise 3.0 WS; and HP-UX 11.0.
New or existing customers may obtain a software subscription online from the Altera website or from Altera distributors worldwide.
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