Product category:
Programmable Logic Devices
News Release from: Altera Europe | Subject: Stratix II
Edited by the Electronicstalk Editorial
Team on 08 February 2006
Speedy FPGAs keep up with DDR2 SDRAMs
The Stratix II device family is qualified to support the 667Mbit/s DDR2 SDRAM interface datarate, which will be standardised later this year.
Altera's Stratix II device family is qualified to support the 667Mbit/s DDR2 SDRAM interface datarate A new autocalibrating PHY memory interface controller intellectual property (IP) core and the superior signal integrity of its Stratix II FPGAs enables Altera to deliver this high datarate to designers of high-speed applications
This article was originally published on Electronicstalk on 27 May 2008 at 8.00am (UK)
Related stories
Software upgrade provides speed boost
Customers using the 8.0 release to design Altera's 65nm Stratix III FPGAs on Windows platforms will see compile times reduced by up to 50%.
Shrink to 40nm increases FPGA capabilities
The Stratix IV family has up to 680K logic elements, 2x bigger than Altera's Stratix III family, which currently comprise currently the largest FPGAs on the market.
"Micron is pleased to work with Altera to provide market-leading memory solutions that address the requirements of today's high-end memory systems", said Terry Lee, Executive Director of Advanced Technology and Strategic Marketing, Micron Technology.
"Stratix II devices and Micron 667Mbit/s DDR2 SDRAM is an excellent combination for customers looking to leverage 667Mbit/s, currently the industry's highest DDR2 datarate".
Altera provides a complete solution to help designers successfully interface Altera FPGAs to DDR2 SDRAM.
Further reading
FPGAs support serial gigabit interface
Stratix III FPGAs are the industry's first programmable logic devices able to support Gigabit Ethernet SGMII on LVDS pins.
FPGAs support SFI-5 optical comms standard
The SFI-5 specification is a chip-to-chip standard that ensures interoperability between forward-error correction and the framer, as well as from industry-leading optical transponder devices.
This offering includes technical documentation, software and tool support, IP cores, demonstration boards, characterisation reports and simulation models.
"We chose Stratix II FPGAs because they provide the highest-performance DDR2 SDRAM memory interfaces, which enable us to deliver industry-leading capabilities in our Uni460 and Uni560 SDRAM testers", said Kang Jong Koo, Chief Research Engineer, Tester Development Group at UniTest.
"The 667Mbit/s DDR2 interface exemplifies the performance customers can achieve with the Stratix II architecture", said David Greenfield, Altera's Senior Director of Product Marketing, High-Density FPGAs.
"Customers can leverage the industry's fastest FPGA fabric, the fastest parallel I/O solution and the superior signal integrity of our Stratix II FPGAs for their high-speed designs".
"Additionally, the availability of our fast speed grade devices enables customers to further achieve best-in-class performance".
Altera has also instigated a DDR2 SDRAM 667Mbit/s customer engagement programme, an opportunity to engage with Altera in advance of the broad release of the 667Mbit/s DDR2 SDRAM interface, which is timed for early Q2 2006.
As a member of this programme, customers can develop their designs using Stratix II, the industry's fastest FPGAs, and Altera's memory solutions.
The memory solutions, including parameterisable IP controller cores and associated design software for DDR2 SDRAM, automatically perform timing margin analysis and constraint selections to simplify the design process and reduce design cycle time.
All speed grades of Stratix II FPGAs have been shipping for over a year and are readily available in volume for customers today.
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