Product category:
Design and Development Software
News Release from: Altera Europe | Subject: Nios II EDS
Edited by the Electronicstalk Editorial
Team on 11 May 2006
Suite speeds embedded processor design
Altera has announced the immediate availability of version 6.0 of the Nios II embedded processor and the Nios II Embedded Design Suite (EDS).
Altera has announced the immediate availability of version 6.0 of the Nios II embedded processor and the Nios II Embedded Design Suite (EDS) The Nios II EDS now includes 32 bit, single-precision, IEEE 754-compatible floating-point support, and the recently announced Nios II C-to-Hardware Acceleration (C2H) Compiler
This article was originally published on Electronicstalk on 27 Jun 2008 at 8.00am (UK)
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"Both the Nios II C2H Compiler and floating point support deliver increased performance and flexibility to embedded software developers, amplifying the fundamental time to market benefits of the Nios II processor as an FPGA-based computing platform", said Chris Balough, Altera's Director of Software and Nios Marketing.
"Including these features in version 6.0 of the Nios II processor and EDS extends Altera's leadership in the embedded systems market".
The Nios II C2H Compiler is a productivity tool for Nios II users that can substantially increase the performance of their embedded software by automatically converting performance-critical C language subroutines into hardware accelerators and integrating them into FPGA-based Nios II subsystems.
Further reading
Shrink to 40nm increases FPGA capabilities
The Stratix IV family has up to 680K logic elements, 2x bigger than Altera's Stratix III family, which currently comprise currently the largest FPGAs on the market.
FPGAs support serial gigabit interface
Stratix III FPGAs are the industry's first programmable logic devices able to support Gigabit Ethernet SGMII on LVDS pins.
Floating point support is delivered as a set of Nios II custom instructions.
Custom instructions off-load software operations into hardware and provide an extremely flexible option for increasing CPU performance.
When selected by the user, the prebuilt floating-point custom instructions are added into the CPU data path automatically, and all subsequent floating-point operations are evaluated using the dedicated hardware.
Fully supported within the software-programming tool chain, floating-point custom instructions offer a completely transparent programming model to the designer.
The Nios II EDS provides designers with the software tools, utilities, libraries and drivers necessary to develop complete Nios II embedded systems in Altera FPGAs.
The Nios II EDS includes the Eclipse-based Nios II IDE, the cockpit for all software development tasks, including: editing, compiling, debugging, profiling and programming.
The Nios II IDE also includes an integrated plug-in for the Nios II C2H Compiler, which is licensed separately.
All active Nios II subscribers will receive the Nios II processor core and Nios II EDS v.6.0 upgrade automatically, and will also have access to a free evaluation licence for the Nios II C2H Compiler.
An annual Nios II subscription may be purchased for as little as $495.
The Nios II C2H Compiler is delivered as an integrated plug-in to the Nios II IDE, and is licensed separately for $2995 per seat.
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