Product category:
Programmable Logic Devices
News Release from: Altera Europe | Subject: Stratix III
Edited by the Electronicstalk Editorial
Team on 10 November 2006
FPGAs raise performance but cut power
The Stratix III FPGA family is claimed to deliver the industry's lowest power consumption of any high-density, high-performance programmable logic device.
Altera Corp has announced its Stratix III FPGA family, claimed to deliver the industry's lowest power consumption of any high-density, high-performance programmable logic device Built on TSMC's 65nm process, Stratix III FPGAs feature groundbreaking innovations including hardware architecture advancements and Quartus II software enhancements
This article was originally published on Electronicstalk on 19 Apr 2007 at 8.00am (UK)
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Working together, these new features deliver 50% lower power, 25% higher performance and 2x the density compared with previous generation Stratix II devices.
Altera Stratix III FPGAs feature two new technologies that dramatically lower power while meeting high-performance requirements.
Reduced power consumption is achieved by using Altera's innovative Programmable Power Technology, which maximises performance where needed while delivering the lowest power elsewhere in the design.
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Programmable Power Technology enables every programmable logic array block (LAB), DSP block and memory block to independently operate at high-speed or low-power mode.
The PowerPlay feature in Quartus II software version 6.1 automatically analyses the design and identifies which blocks are in the critical path and demand the highest performance, setting these to high-speed mode.
All other logic is automatically put into low-power mode.
The second power-optimising feature, selectable core voltage, provides the designer options to select either 1.1V for designs needing the highest performance or 0.9V for designs requiring minimum power consumption.
"The OneBase family of basestation systems offers network operators a range of techniques and deployment technologies to meet build-out requirements and deliver coverage, capacity and high-quality service to end-users", said Bob Suffern, Vice President, Research and Development at Andrew Corporation.
"The Stratix and HardCopy families have been a key enabler of Andrew's success in this space".
"And Stratix III, with its lower power consumption, higher integration and path to HardCopy III structured ASICs remains at the heart of our design plans".
Stratix III devices offer the highest memory-to-logic ratio and DSP performance compared with any other FPGAs in the industry.
To address a full range of high-end applications, three new Stratix III family variants are offered: one delivering balanced logic, memory and DSP resources for general-purpose applications, a second providing enhanced memory and DSP resources for memory- and DSP-intensive applications and a third offering integrated transceivers for high-bandwidth interface applications.
Additionally, Altera provides a unique and risk-free migration path from Stratix III FPGAs to HardCopy structured ASICs.
"As high-end FPGAs are increasingly used as the heart of many electronics systems, it is critical for OEMs to achieve new levels of performance and density while minimising power consumption", said Jordan Plofsky, Altera's Senior Vice President of Marketing.
"Stratix III FPGAs feature a perfect combination of hardware enhancements and new software capabilities designed to maximise productivity".
"Our customers can now design their next-generation systems with confidence and successfully get to market quickly and efficiently".
The Stratix III family architecture is based on the same FPGA fabric as the industry-leading Stratix II family featuring high-performance adaptive logic modules (ALMs).
Working together, Stratix III FPGAs and Quartus II software offer the industry's most innovative design methodology for improved productivity and performance.
This enables designers to efficiently move their designs from development to production and meet both technical and business goals.
In addition to the Quartus II design software, tools from leading EDA vendors Aldec, (System Verification Environment (SVE)), Magma Design Automation (Blast FPGA), Mentor Graphics Corporation (Precision Synthesis) and Synplicity (Synplify Pro FPGA synthesis and Synplify DSP software) all support the Stratix III device family, ensuring the highest quality of results in Altera devices.
Engineering samples of the first member of the Stratix III device family will be available in the third quarter of 2007.
Customers can start their Stratix III designs today using Altera's Quartus II design software version 6.1.
1000-unit pricing starts at $549 for the EP3SL150 device in 2007.
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