FPGAs host multiformat HD video decoder IP core

Ittiam Systems uses Stratix II FPGA family to develop and deliver its Trinity multiformat high-definition video decoder soft intellectual property core.

Bangalore-based DSP systems specialist Ittiam Systems has selected the Stratix II FPGA family to develop and deliver its Trinity multiformat high-definition video decoder (MFVDEC) soft intellectual property (IP) core.

This IP core is designed for digital TV, high-definition (HD) DVD, HD IPTV and HD set-top-box solutions.

Ittiam selected Altera's Stratix II FPGA family for its high density, high performance and superior signal integrity.

"Stratix II FPGAs provide Ittiam with a new and innovative architecture that offers higher performance and higher density at a lower cost", said Ravi Shankar Ganesan, Vice President of the SoC business of Ittiam Systems.

"Altera's Stratix II FPGAs have enabled Ittiam to deliver the MFVDEC IP core with a complete FPGA-based validation platform for the IP".

By using Altera programmable solutions, Ittiam's MFVDEC IP core can handle complex functions such as context-adaptive binary arithmetic coding (CABAC), motion compensation, motion vector prediction and deblocking for H.264 and Video Codec 1 (VC1, the SMPTE video standard based on Microsoft's Window Media codec).

The combination of Altera's Stratix II FPGA family, Quartus II design software and Nios II embedded processor cores provided Ittiam with a user-friendly toolset for developing soft-core IP.

"Stratix II FPGAs enable Ittiam to engage in the development of DSP systems and offer customers a high-quality product with a compelling time-to- market advantage", said David Greenfield, Senior Director of Product Marketing for High-End FPGAs at Altera.

"Ittiam has taken full advantage of Altera's programmable solutions to achieve both their business objectives and technology goals".

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