Product category:
Communications ICs (Wired)
News Release from: Agere Systems | Subject: UB2G5LC, UB2G5NP and UB2G5AG
Edited by the Electronicstalk Editorial
Team on 02 June 2003
Bridge chips accelerate multiservice
platforms
Three new high-speed universal bridge chips and a software reference design are key vehicles for creating complete system solutions for current and next-generation multiservice telecomms equipment.
Agere Systems has released three high-speed universal bridge chips and a software reference design that are key vehicles for creating complete system solutions for current and next-generation multiservice telecommunications equipment The chips and software conjoin and augment Agere's single-chip APP550 traffic management processor; PI-40SAX (protocol independent, stand-alone switch) - the world's fastest switching chip - and Festino hardware and software reference design, to deliver comprehensive system solutions that dramatically lower total system costs and accelerate product deliveries
This article was originally published on Electronicstalk on 24 Oct 2002 at 8.00am (UK)
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Agere's family of universal bridge chips, software, traffic processor, and switching chips will be demonstrated at next week's Supercomm 2003 show (booth 21246).
"These bridge chips and reference design software are key pieces to the puzzle for increasing capacity and lowering total system cost of current and next generation multiservice equipment, especially equipment requiring traffic management capabilities", said Mark Pinto, Vice President with Agere's Processing, Aggregation and Switching division.
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Agere's bridge chips are communications protocol conversion engines for moving signals through much fewer wires at higher speeds (2.5Gbit/s) than alternative technologies.
Using Agere's leading serialiser/deserialiser (serdes) technology, these signals accelerate through the company's bridge chips en route to their own and other companies' chips.
"The concept of how the bridge chip serdes functions is similar to 32 cars (signals) leaving their driveways, then travelling at 35 miles per hour in a neighbourhood, then getting on a two-lane superhighway", said Pinto.
"All 32 of those cars, when they get on the superhighway, can immediately accelerate to more than 1000 miles per hour".
Agere's common, reusable architecture allows equipment manufacturers to design fewer circuit boards and reuse these among multiple equipment platforms, reducing, chip, electronics, equipment and total system costs.
This architecture lowers telecom service providers' inventory costs because fewer circuit board types need to be maintained.
The bridge chips assist service providers in deploying their services using a broad range of communications networking equipment including digital subscriber line access multiplexers, routers, wireless base stations, and storage area network servers.
Multiservice equipment can transport the major communications protocols: Frame Relay, Asynchronous Transfer Mode, and Internet Protocol, at multiple speeds using the bridge chips' multiple standard interfaces.
One of the three new Agere chips, the UB2G5NP, links Agere's traffic processing chips to the PI-40 switching chip family.
Agere's second bridge chip, UB2G5LC (universal bridge, 2.5 generation line card chip), aggregates ATM cells from chips using the industry standard interface to Agere's PI-40X/C and PI-40SAX high speed switching chips.
The third chip, the UB2G5AG (aggregation), is for equipment needing only aggregation of line cards into a network processor function, rather than a full switching chip function.
It provides a low cost solution to serialise the backplane.
The Agere comprehensive solutions are used, for example, in next generation digital subscriber line access multiplexers to increase the number of subscribers supported and the capacity available per subscriber.
The UB2G5LC device can aggregate four times as many digital subscriber line channels on a line card as previous products.
This traffic is transported across a point-to-point serdes backplane to the PI-40SAX switching fabric and APP550 traffic processor.
The APP550 will schedule and shape the traffic on the network card.
Smaller equipment can use the UB2G5AG device to aggregate traffic from line cards directly to the APP550 traffic processors.
This architecture provides a low cost interconnect scheme that can support high data rates to an increased number of subscribers.
The UB2G5LC, UB2G5NP and UB2G5AG are priced at $40, $50 and $90, respectively in quantities of 10,000.
Agere's new comprehensive software reference design for equipment manufacturers implements multiprotocol label switching (MPLS).
The networking equipment industry is migrating toward wider use of MPLS technology to guarantee better quality of service and more revenue-generating capabilities for service provider customers.
These quality of service benefits stem from Agere's leading traffic management technology.
Agere's associated software reference design for networking equipment can save equipment manufacturers millions of dollars in software development costs and propel them to market up to two years faster.
By using Agere's unique and efficient programming model, customers typically write 24 times fewer lines of software code than with competitive programming models.
This translates to lower product development costs, higher product reliability, and faster product deliveries.
"Now our customers can immediately obtain our complete software package that runs with our devices", said Pinto.
"This saves them enormous amounts of time and money because they don't have to produce the software themselves".
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