Crosspoint switch enters production

The Agilent HDMP-3268 nonblocking crosspoint switch IC is a 68 x 68 port device designed to route data in high-performance core network equipment.

The Agilent HDMP-3268 nonblocking crosspoint switch IC is a 68 x 68 port device designed to route data in high-performance core network equipment, such as optical crossconnects, add-drop multiplexers, backplane interconnects for large Fibre Channel and ATM switches, and scalable optical switch fabrics.

Each data channel supports speeds up to 3.2Gbit/s, providing total throughput of over 200Gbit/s.

The crosspoint switch, combined with Agilent's 12-channel parallel optics modules (HFBR-712BP transmitter and HFBR-722BP receiver), comprise Agilent's full datapath solution for switch fabrics up to 2048 x 2048 in size.

"Agilent's low jitter crosspoint switch IC simplifies the design of high-capacity switch fabrics via direct coupling to additional crosspoint switches", said Martin Scott, Vice President and General Manager of Agilent's Storage and Networking Division.

"Equipment manufacturers also appreciate the system flexibility our switch IC provides through its easy interfacing to the backplane or parallel optics transceivers".

All of the HDMP-3268's 68 inputs are capable of multicast/broadcast to any or all of the 68 outputs, offering maximum flexibility for system designers.

Its programmable high-speed output signal amplitude optimises drive levels for system environment, improving signal integrity and reducing crosstalk and power consumption.

The device's programmable input equalisation optimises input filtering for good signal integrity.

Two independent configuration registers allow simultaneous multiple channel reconfiguration for more seamless switching.

The HDMP-3268's output voltage levels are programmable from 0.55 to 1.05V.

It provides SSTL-2 and LVTTL-compatible inputs and outputs on the programming bus and the control signals.

The IC provides low jitter and high signal integrity, and operates from a single supply voltage of 2.5V.

The device is implemented in a high-performance low-power BICMOS process, and is packaged in a 400-pin high-performance ball grid array.

The package's 1.27mm footprint pitch makes board layout and manufacturing easy, and conforms to Bellcore standards.

Back to top