Product category:
Communications ICs (Wired)
News Release from: Avago Technologies | Subject: HPFC-5600
Edited by the Electronicstalk Editorial
Team on 13 November 2003
Fibre Channel controller spots mistakes
The HPFC-5600 is the industry's first 2Gbit/s dual-channel Fibre Channel controller to include error detection code for early detection of data corruption in storage subsystems.
The Agilent HPFC-5600 is the industry's first 2Gbit/s dual-channel Fibre Channel controller to include error detection code (EDC) for early detection of data corruption in storage subsystems EDC ensures end-to-end data integrity from the host server to the target storage devices, providing companies with increased reliability and safeguarding of valuable corporate data
This article was originally published on Electronicstalk on 8 Nov 2004 at 8.00am (UK)
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The Agilent HPFC-5600 Tachyon DX2+ Fibre Channel controller IC uses EDC to flag the data error and inform the memory subsystem's software driver.
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The driver can then take corrective measures to recover the I/O.
This fifth-generation Agilent Tachyon controller offers industry-leading performance for storage subsystems, SCSI to Fibre Channel bridges, host bus adapters, and mid-to-high-end storage applications that use multiprocessor systems.
The dual-channel 2Gbit/s single-chip HPFC-5600 advances the existing Tachyon DX2 dual-channel architecture by combining a complete hardware-based solution that uses an EDC protection algorithm for interfacing between Fibre Channel mass storage devices and the main memory of the subsystem.
The Agilent HPFC-5600's EDC algorithm maintains the SCSI command structure and architecture model, and enables EDC to stay with the data for its entire life within the storage array.
It allows a protection domain to be initiated, propagated and terminated by using a standard mechanism to guard the data, enhancing end-to-end data integrity.
The Agilent HPFC-5600 supports dual-channel, full duplex Fibre Channel port operation, which saves valuable board space for system manufacturers.
It features 1 and 2Gbit/s operation, and provides backward compatibility to previous-generation Tachyon controllers.
The HPFC-5600 interfaces to the industry-standard 33 and 66MHz PCI and 66/100/133MHz PCI-X (enhanced PCI) bus architecture with 32 and 64bit support.
Agilent's proven state machine architecture scales proportionately with system CPU resources to avoid performance bottlenecks associated with on-chip processors.
This architecture allows simultaneous, parallel processing of inbound data, outbound data, and hardware control and commands to maximise bandwidth and minimise latency and I/O overhead.
The Agilent HPFC-5600 Tachyon DX2+ Fibre Channel controller IC is available in samples to select customers through Agilent's direct sales channel.
Volume production is expected in the first quarter of 2004; pricing will be set at that time.
Also available are the complementary Tachyon software development kit version 3.3 and Fibre Channel adapter boards based on the dual-channel Tachyon DX2+ architecture. Request a free brochure from Avago Technologies ...
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