Product category:
Stand-Alone Instruments
News Release from: Agilent Technologies Europe | Subject: J-BERT N4903A
Edited by the Electronicstalk Editorial
Team on 09 January 2007
Software upgrades serial bit-error-rate
tester
Software release 4.5 for the Agilent J-BERT N4903A high-performance serial bit-error-rate tester enables test engineers to retrieve the fastest jitter tolerance test results.
Agilent Technologies has introduced software release 4.5 for the Agilent J-BERT N4903A high-performance serial bit-error-rate tester that enables test engineers to retrieve the fastest jitter tolerance test results The next generations of multigigabit devices are emerging throughout the computer, storage and communications industries
This article was originally published on Electronicstalk on 19 Jan 2007 at 8.00am (UK)
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Automated jitter tolerance tests significantly reduce the programming effort.
The new J-BERT software 4.5 provides the following benefits: one-click jitter tolerance test insight with one-screen results that show all tested points and the test limits; faster device debug with restore of jitter setup by clicking on tested points in the jitter tolerance result screen; quicker documentation of test results with the new all-inclusive jitter tolerance compliance report in HTML format; worst-case testing of computer bus devices with SSC (spread spectrum clocking); SSC can be enabled during the automated jitter tolerance tests; and convenient web-based access to J-BERT's user interface from any remote web location with the new web server.
J-BERT can be operated in far-distance, noisy or environmental test labs even if the user is offsite and has no knowledge of instrument programming.
Agilent's new one-click-results software further accelerates jitter tolerance insight with a one-screen result display that shows all passed and failed tested conditions as well as specification limits.
A jitter setup can now be restored simply by clicking on tested points.
For quicker test documentation, J-BERT now generates all-inclusive jitter tolerance compliance test reports in HTML format.
"Design and validation teams require the most accurate and efficient test equipment to ensure new designs operate robustly and are available in time", said Siegfried Gross, Vice President and General Manager of Agilent's Digital Verification Solutions Division.
"Agilent demonstrates its leadership by continuously providing a complete set of best-in-class tools for physical layer testing for the next generation of gigabit technologies".
In addition to the new "one-click jitter tolerance test results", all J-BERTs are now equipped with an improved clock data recovery (CDR) for the error detector.
To support all emerging and proprietary datarates the built-in CDR operates over the complete range of 1 to 12.5Gbit/s.
For optimising the jitter budget and making tests under compliant CDR conditions, the option CTR "compliant CDR with tunable loop bandwidth" is available.
Installed J-BERTs can be upgraded to the new CDR functionality.
The new software revision 4.5 for the Agilent J-BERT N4903A high-performance serial BERT is available now as a free download from the web.
The new clock data recovery capabilities are also available now for shipment.
The option CTR for the compliant and tunable loop bandwidth is priced at US $21,000.
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