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Power SoCs take Flash memory onboard
AMI Semiconductor can now offer Flash memory embedded in its high-voltage CMOS based system-on-chip designs.
AMI Semiconductor can now offer Flash memory embedded in its high-voltage CMOS based system-on-chip designs.
The integration of HiMOS nonvolatile memory (NVM) with the company's established I3T80 SmartPower technology allows designers to develop fully integrated solutions that achieve important cost and space savings plus performance benefits for their applications.
The inclusion of Flash memory requires only three additional mask layers to the I3T80 base technology mask set.
The small number of extra layers that are needed helps ensure designs are as cost effective as possible.
Available Flash memory sizes range up to 64Kbyte with 100 erase cycles for code storage, and up to 512byte and 10,000 erase cycles for data storage.
With an operating temperature range of -40 to +125C, I3T80 SoC designs with embedded Flash are well suited to applications in the most demanding environments.
Further key features of NVM Flash include a sector and multiple sector erase time of 0.5s and page program in 20us (32 pages per sector).
Random access read time is 100ns for either 8 or 16bit words.
The memory can retain data for up to 10 years and has automotive qualification to AEC-Q100.
AMI Semiconductor's Flash memory has been developed in conjunction with IMEC, Europe's leading independent research centre in nanoelectronics and nanotechnology, and uses IMEC's High Injection MOS (HiMOS) split gate technology.
I3T80 enables the delivery of 0.35um CMOS-based SmartPower SoC solutions for voltages up to 80V.
The technology allows the integration of complex digital circuitry, embedded microprocessors and high voltage functionality on a single IC and is suitable for automotive, medical, industrial, and other high-voltage designs.
AMIS supports the supply of its SoCs with integrated NVM Flash for the lifetime of a project; in automotive and industrial applications this can be 10 years or more.
This protects against the risk of needing to periodically requalify a design due to the phasing out of current technology in favour of newer approaches, a problem that often occurs when using stand-alone NVM.