Top-speed ADCs cut size and power consumption

High-speed 10 and 12bit ADCs target broadband applications where low power consumption is required to accommodate smaller form factors, but high-quality conversion performance cannot be sacrificed.

Analog Devices has developed a family of high-speed 10 and 12bit analogue-to-digital convertors (ADCs) targeted for broadband communications and wireless infrastructure applications - such as cable modem termination systems, third- and fourth-generation microcell and picocell basestations, and fixed point-to-point radios - where low power consumption is required to accommodate smaller form factors, but high-quality conversion performance cannot be sacrificed.

The flagship device is a 12bit, 250Msample/s ADC that cuts power consumption by more than 40%, is available in a package 20% smaller than competing ADCs, and maintains superior signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) at high intermediate frequencies (IFs).

"The AD9230 is the only 12bit, 250Msample/s ADC that has been able to bring power consumption below the 500mW threshold, thus increasing power efficiency, decreasing system size and minimising thermal management costs-attributes which are extremely important for today's high-performance wireless and wired applications", said Kevin Kattmann, Product Line Director, High Speed Signal Processing Group.

"The AD9230, used in the transmit path of picocell or microcell basestations to optimise power amplifier linearisation, also facilitates more rapid system deployment by enabling smaller-sized end-systems".

"In cable termination systems, growing demand for digital cable services is placing greater emphasis on bandwidth, calling for low-power ADCs that allow higher channel density".

The 12bit 250Msample/s AD9230 is the flagship device in a family of pin-compatible, low-power convertors.

The device operates from a single 1.8V supply, dissipates only 425mW of power and is capable of maintaining excellent SNR (65.5dB full scale) and SFDR (8dBc) with a 70MHz input.

The AD9230 features an on-chip reference and track-and-hold, two parallel low-voltage differential signalling (LVDS) output modes (ANSI644 and IEEE1596.3 reduced range link) to ease the interface to FPGAs, and a double datarate (DDR) mode which halves the number of parallel outputs required.

The DDR, combined with the IEEE1596.3 reduced range link LVDS option, further reduces power consumption to 385mW.

To maximise system performance, the AD9230 can be used with ADI's AD8368, AD8369 and AD8370 radio frequency (RF) variable gain amplifiers.

The family includes the 12bit AD9230 offered in three speed grades (250, 210 and 170Msample/s) and the 10bit AD9211 also offered in three speed grades (250, 200 and 170Msample/s).

The 12bit AD9230 will be sampling in May 2006, and the 10bit AD9211 will be sampling in June 2006.

Full production quantities of both devices are scheduled for September 2006.

Available in Pb-free 8 x 8mm LFCSPs (lead frame chip scale packages), the devices are fully specified over the industrial temperature range (-40 to +85C).

The 12bit AD9230 is priced per unit in 1000-piece quantities at $59 (250Msample/s), $42 (210Msample/s) and $35 (170Msample/s).

The 10bit AD9211 is priced per unit in 1000-piece quantities at $39 (250Msample/s), $32 (200Msample/s) and $25 (170Msample/s).

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