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Product category: Analogue and Mixed Signal ICs
News Release from: Analog Devices | Subject: AD9640
Edited by the Electronicstalk Editorial Team on 20 December 2006

Dual 14bit ADC speeds up to WiMAX

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The AD9640 is billed as the only dual 14bit ADC that samples at rates beyond 135Msample/s, a common requirement for the emerging WiMAX standard.

Analog Devices has introduced the first dual 14bit analogue-to-digital convertor (ADC) to achieve sampling rates of 150Msample/s Supporting all third-generation (3G) basestation wireless standards, including W-CDMA, CDMA2000 and TD-SCDMA, the AD9640 is the only dual 14bit ADC that samples at rates beyond 135Msample/s, a common requirement for the emerging WiMAX (Worldwide Interoperability for Microwave Access) standard

Prior to the AD9640, sampling rates beyond 135Msample/s could only be realised by using single-channel ADCs.

With the AD9640, basestation designers are able to reach higher sampling rates with one dual ADC, enabling a 50% reduction in board space requirements.

Additionally, the AD9640 simplifies the design of multicarrier wireless infrastructure systems by decreasing the amount of analogue filtering in front of the ADC and offering low power consumption.

"Today's basestation manufacturers are faced with designing for a variety of 3G wireless standards, as well as the emerging WiMAX standard, while also focusing on reducing costs", said Kevin Kattmann, Product Line Director, High Speed Signal Processing Group, Analog Devices.

"Addressing this challenge, the AD9640 offers the performance and sample rate required for these standards, but also provides the low power, small size and digital features to lower overall system costs".

The new ADC delivers best-in-class performance, while only consuming 390mW of power per channel.

The AD9640 offers signal-to-noise ratio (SNR) of 72.7dB FS and spurious free dynamic range (SFDR) of 85dBc with a 70MHz intermediate frequency (IF), and is also capable of supporting IFs as high as 450MHz, enabling WiMAX designers to use a single downconversion receiver design instead of the traditional two downconversion stages.

For optimal performance, the AD9640 can be driven with ADI's AD8352 low distortion differential amplifier.

The AD9640 divides the input clock by an integer between 1 and 8, reducing system complexity and improving clock jitter.

In a traditional basestation transmitter, the digital-to-analogue convertors (DACs), such as ADI's AD9779, will have a higher clock rate, which is divided down to match the ADC.

By implementing the clock divider on-chip, the AD9640 eliminates the need for an external divider.

In addition, the phase noise of the source improves in proportion to the divide ratio.

Incorporated on the AD9640 are digital features that reduce system costs by simplifying the automatic gain control (AGC) loop in the receiver.

The new convertor is the industry's first to integrate digital features including a block that monitors the incoming composite signal power, and indicates whether the gain of the receiver needs to be increased or decreased.

While the signal monitor block can act as a slow mechanism to change the receiver gain, the AD9640 also includes fast detect (FD) modes, allowing designers to detect an input overrange condition in as few as two clock cycles, immediately reducing the gain to avoid overdriving the analogue front end.

In addition to providing clipping information, the FD bits have programmable thresholds that are useful in optimising the receiver AGC loop.

The AD9640 is sampling now with production quantities available in April 2007.

The ADC is available in 12 and 14bit resolutions with sample rates of 80, 105, 125 and 150Msample/s.

CMOS and LVDS output modes are supported.

The 14bit ADC is priced between US $37.50 and $87.50 and the 12bit ADC is priced between $25.05 and $47.97 in 1000-piece quantities.

Both versions are packaged in 9 x 9mm, 64-lead LFCSP (lead-frame chip-scale package) packages.

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