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Product category: Intellectual Property Cores
News Release from: ARM | Subject: MPCore
Edited by the Electronicstalk Editorial Team on 19 May 2004

Multiprocessor core provides the power
of four

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The MPCore synthesisable multiprocessor, based on the ARMv6 architecture, can be configured to contain between one and four processors delivering up to 2600MIPS of Dhrystone performance.

New from ARM at this week's Embedded Processor Forum in San Jose is a new form of licensable processor, which has been developed as part of its ongoing partnership with NEC Electronics The MPCore synthesisable multiprocessor, based on the ARMv6 architecture, can be configured to contain between one and four processors delivering up to 2600MIPS of Dhrystone performance

The MPCore multiprocessor implements Adaptive Shutdown technology and the ARM Intelligent Energy Manager technology to reduce power consumption by up to 85%.

NEC Electronics will use the configurable ARM processor in high-performance, low-power products across the consumer electronics, automotive and mobile markets.

The new ARM multiprocessor solution delivers greater performance at lower frequencies than comparable single processor solutions, bringing significant cost savings to system designers.

Multiprocessing is ideal for demanding applications executing multiple tasks at the same time such as consumer entertainment and convergence devices in the home and car.

Examples include a set-top-box recording several TV channels while sharing home movies across the Internet, and an in-car navigation system delivering simultaneous back-seat video gaming.

The MPCore multiprocessor supports up to four-way cache coherent symmetric multiprocessing (SMP), up to four-way asymmetric multiprocessing (AMP), or any combination of both.

This flexibility provides increased throughput and system responsiveness, with full portability of existing applications and scalable performance for multithreaded applications.

The ability to support multiple workloads addresses the needs of networking devices to process more packet streams and higher data throughput.

"Multiprocessing can give system designers very high processing performance combined with low power consumption".

"Through our partnership with NEC Electronics we have developed the ground breaking MPCore multiprocessor which delivers the benefits of scalable multiprocessing in a configurable and easy to use implementation," said Mike Muller, CTO, ARM.

"Our commitment to producing innovative IP enables our partners to produce the most advanced digital products, and enrich the end-user experience, in the consumer electronics and networking markets".

"These are areas where we are seeing considerable growth in the deployment of the ARM architecture." "The announcement of the high-performance, low-power MPCore multiprocessor is a major milestone in our ongoing collaboration with ARM," said Hirokazu Hashimoto, Executive Vice President of NEC Electronics.

"The MPCore multiprocessor enables us to deliver high-performance and low-power solutions for next-generation multimedia processing applications in the wireless mobile, home, and automotive markets".

"It is innovative IP that enables us to provide scalable system solutions to customers through efficient software reuse based on the advanced MPCore multiprocessor architecture, and create true system LSI solutions for next-generation digital devices." The MPCore multiprocessor supports both SMP and AMP software models, and supports a broad range of operating systems and application software.

"Combined with innovative power conservation, the new ARM multiprocessor core will enable device manufacturers to deliver high-performance applications," said Glenn Seiler, Director, Product Marketing, MontaVista Software.

"Developers will appreciate the strong synergy between this technology and MontaVista Consumer Electronics Edition's dynamic power management capabilities and native Linux support for symmetric multiprocessing." "The MPCore multiprocessor provides the technology the industry needs to create complex and high-performance devices," said Robert Day, Director of Marketing from Mentor Graphics Embedded Systems Division.

"Development of a multiprocessor interface within our Nucleus Plus RTOS will be consistent with the technology in the MPCore multiprocessor and we look forward to releasing the Nucleus operating system for this platform." "At the KTH Royal Institute of Technology of Sweden, we have published multiple papers on the energy and performance advantages of multiprocessor designs in embedded systems using a similar adaptive shutdown technique as supported by the MPCore multiprocessor," said Mats Brorsson, Professor in Computer Architecture at KTH.

"In transferring our OpenMP compiler technology to ARM that simplifies the development of SMP applications, we have been able to demonstrate the advantages of multiprocessor technology we had previously predicted." The MPCore multiprocessor supports the ARMv6 architecture, with SIMD media extensions for next-generation rich multimedia and convergent devices and ARM Jazelle Java acceleration.

The MPCore multiprocessor implements between one and four processors with cache coherency using a modified MESI protocol.

It also features configurable level 1 caches, 64bit Amba AXI interfaces, vector floating-point coprocessors and programmable interrupt distribution.

The processor supports adaptive shutdown of unused processors to give dynamic power consumption as low as 0.57mW/MHz from a generic 130nm process excluding cache.

The ARM Intelligent Energy Manager technology can further reduce consumption by dynamically predicting the required performance and lowering the voltage and frequency.

The MPCore multiprocessor enables system designers to view the core as a single "uniprocessor", simplifying development and reducing time to market.

The MPCore multiprocessor is available for licensing from ARM now.

First silicon is expected Q2 2005.

An evaluation system for the MPCore multiprocessor with Linux 2.6 OS and development tools is available today to enable early software development for MPCore multiprocessor designs.

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