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Product category: Microprocessors, Microcontrollers and DSPs
News Release from: ARM
Edited by the Electronicstalk Editorial Team on 10 November 2004

SoC solution collaboration to feature
low energy

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ARM, Artisan Components, National Semiconductor, Synopsys and UMC are collaborating to deliver a comprehensive energy-efficient system-on-chip technology demonstrator for the ARM926EJ-S processor.

ARM, Artisan Components, National Semiconductor, Synopsys and UMC today announced that the five companies are collaborating to deliver a comprehensive low-power, energy-efficient system-on-chip (SoC) technology demonstrator for the ARM926EJ-S processor The "Ultra" technology demonstrator for the ARM926EJ-S processor is being implemented in UMC's 130e Fusion process, a 130-nanometer (nm) process platform designed for the integration of high-speed and low-leakage transistors in a single CMOS process

The Ultra technology demonstrator name stands for UMC Low-power Technology Reference using the ARM926EJ-S processor.

Lowering power is one of the greatest challenges facing the IC industry today.

Each of the five companies in this collaboration has demonstrated technologies that contribute substantial power savings.

The close collaboration between the five companies promises to deliver even greater systematic power savings by linking their power-saving technologies into an integrated power reduction solution.

The combined power-savings capabilities of these technologies are expected to demonstrate up to 60 percent energy savings.

This savings is expected to translate directly into the longer battery life required by the fast growing hand-held/portable markets in which multimedia products that include 3-D graphics, video/audio and communications functions are becoming more prominent.

The Ultra technology demonstrator for the ARM926EJ-S processor will incorporate ARM Intelligent Energy Manager (IEM) technology and the National Semiconductor PowerWise Technology Advanced Power Controller (APC) with an integrated Hardware Performance Monitor (HPM) to reduce overall power and energy consumption.

The combined technologies enable the system to implement Adaptive Voltage Scaling (AVS) as well as frequency scaling.

The system is expected to show the lowest voltage and frequency required to meet software deadlines while maintaining user quality.

The Ultra SoC technology demonstrator for the ARM926EJ-S processor will use Synopsys' leading Galaxy Design Platform for a comprehensive low-power design implementation flow that includes multi-voltage and multi-frequency design optimization.

Additionally, the Ultra SoC technology demonstrator for the ARM926EJ-S processor will use Synopsys' DesignWare Library for AMBA bus and peripheral IP to implement a complete SoC.

Synopsys Professional Services is providing the RTL-to-tapeout design services for the demonstrator chip using this advanced low-power methodology.

Artisan's Metro platform of products is the underlying physical IP that enables the low-power technology demonstrator design.

The platform includes standard cells, I/Os, memories, phase locked loops (PLLs) and other mixed-signal cells designed for low dynamic and leakage power at any operating voltage.

In addition, the products are characterized to operate at very low voltages, thus allowing the energy reduction enabled by ARM IEM technology.

The technology demonstrator will be enabled by UMC's advanced 130-nm Fusion process, which combines high-speed and low-leakage transistors onto a single chip to create a low-power solution while minimizing performance trade-offs.

The embedded ARM926EJ-S processor is already silicon proven in UMC's process.

The ARM926EJ-S processor delivers high performance, low power and operates at low-voltage ranges.

The technology demonstrator will include a finished SoC, a demonstration printed circuit board (PCB), and software, and will show how each company's low-power capabilities contribute to a comprehensive low-power offering.

The SoC resulting from the collaboration is not intended for sale, but instead to demonstrate both the unique and combined capabilities of the five companies when applied to the problem of IC power use.

The partners are planning to exhibit the technology demonstrator at select tradeshows beginning in early 2005.

"The demand for low-power chip solutions continues to increase as consumers are seeking increasingly more complex handheld wireless devices with evermore functionality," said Mike Inglis, executive vice president marketing, ARM.

"By aligning with Artisan, National Semiconductor, Synopsys and UMC in the development of the ULTRA technology demonstrator for the ARM926EJ-S processor, we believe we will demonstrate the value and market appeal of each company's technology." "Artisan's Metro platform, developed to address the many power-management challenges in nanometer design, is based on a series of new architectures that dramatically reduce power while enhancing density and yield: resulting in up to an 80 percent reduction in power, up to a 20 percent reduction in area and improved production yield," said Neal Carney, Artisan's vice president of marketing.

"Through collaboration with industry leaders, Artisan helps enable integrated solutions that can assist IC designers in the successful and timely delivery of power-efficient SoCs." "National's PowerWise Technology is enabling makers of cell phones and other portable devices to offer new features without compromising the battery life consumers have come to expect," said Peter Henry, vice president of Portable Power Systems at National Semiconductor.

"Together with the partner companies, National is delivering comprehensive off-the-shelf low power solutions and enabling faster time-to-market with the ease and simplicity of proven silicon, advanced design tools and core reference designs." "In order to address today's advanced silicon challenges, a much broader and deeper industrial collaboration is needed than ever before.

This collaboration provides a production-proven methodology that will allow designers to take advantage of the advanced low-power capabilities in UMC's 130 nanometer and below processes," said Rich Goldman, vice president, Strategic Market Development, Synopsys "Synopsys' Galaxy Design Platform and DesignWare Library's AMBA technology-based IP, in conjunction with Synopsys Professional Services, offer a complete low-power design flow that helps designers achieve power closure, helps ensure power integrity and helps improve yield, thus reducing time-to-market for their products." Patrick T.

Lin, chief SoC architect at UMC, added, "Today's portable products continue to increase in functionality while shrinking in size, meaning that a chip has to do more while still maintaining reasonable power consumption.

The Ultra technology demonstrator for the ARM926EJ-S processor is optimized for these applications as it delivers low-power characteristics without sacrificing performance.

We are pleased to be the premier foundry to partner with leading companies in their field on this fully-supported low-power, low-energy demonstration.".

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