Product category:
Intellectual Property Cores
News Release from: ARM | Subject: Artisan Metro
Edited by the Electronicstalk Editorial
Team on 27 May 2005
IP platform optimised for UMC 130nm
process
ARM is to provide its Artisan Metro low-power IP platform for UMC's advanced 130nm process technology.
ARM is to provide its Artisan Metro low-power IP platform for UMC's advanced 130nm process technology The ARM Artisan physical IP, developed specifically for performance-oriented, portable electronic devices, significantly reduces power while enhancing density and yield: resulting in up to an 80% reduction in power, up to a 20% reduction in area and improved production yield
This article was originally published on Electronicstalk on 7 Jun 2005 at 8.00am (UK)
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The ARM physical IP, optimised for UMC's 130nm process, provides foundry customers with an ideal low-power solution for portable IC design.
The licensed ARM physical IP products include the Artisan Metro low-power standard cells, I/Os and memories designed for low dynamic and leakage power.
All products are characterised for timing and power over an extended range of voltages, enabling customers to do accurate pre-tapeout simulation of multiple-voltage designs.
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The IP conforms to the Artisan design standard supporting recent releases of leading EDA tools that simplify power-optimised design and increase design productivity.
The suite of products enables advanced power management methodologies by providing library components such as voltage level shifters and power gating cells for use with both memories and standard cell blocks.
Additionally the agreement provides for ARM to distribute its UMC-based IP under its Artisan Access Library Programme on a worldwide basis at no charge to licensed design teams.
"UMC is committed to providing customers with the latest technologies that address power-management issues for nanometre design", said Ken Liou, Director of the IP and Design Support Division at UMC.
"This agreement with ARM adds silicon-proven Artisan Metro analogue, digital and mixed signal low-power IP to our low power IP portfolio, and broadens UMC's commitment to providing customers with tools to help with the successful delivery of power-efficient SoCs".
UMC's agreement with ARM comes after the two companies collaborated with several leading companies on a comprehensive low-power, energy-efficient system-on-chip (SoC) technology demonstrator for the ARM926EJ-STM processor.
"Optimising nanometre designs for dynamic and leakage power is a challenging task for IC designers", said Neal Carney, Vice President of Marketing, Physical IP, ARM.
"ARM has worked closely with UMC to implement our Artisan low-power platform products in UMC's 130nm process to solve these challenges".
"Including these products in the Artisan Access Library programme at no charge to IC designers enables sophisticated lower power design techniques to move into the mainstream of IC design for foundry customers".
Front-end views of the ARM Artisan Metro low-power IP for UMC's 130nm process will be available in third quarter 2005 and complete views will be available fourth quarter 2005.
Licensed design teams can download at no charge on the ARM website.
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