Product category:
Intellectual Property Cores
News Release from: ARM | Subject: Velocity VSL210 PHY
Edited by the Electronicstalk Editorial
Team on 02 February 2007
Physical layer IP helps put compliant
PCIe on SoCs
High-performance PCI-SIG-compliant solution can reduce costs and accelerate the development of PCI Express technology based SoCs.
ARM and Northwest Logic have announced the availability of a high-performance PCI-SIG-compliant solution that can reduce costs and accelerate the development of PCI Express technology based SoCs Ideal for enterprise, desktop, mobile, communications and embedded applications, this high-performance solution includes the ARM Velocity 2.5Gbit/s serial link PHY (VSL210) physical layer (PHY) for PCI Express and Northwest Logic's complete PCI Express Solution which includes PCI Express intellectual property (IP) cores in x1, x4 and x8 lane configurations, development boards, drivers, and demonstration applications
This article was originally published on Electronicstalk on 8 Nov 2004 at 8.00am (UK)
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"Validating the interoperability of the ARM Velocity PHY and our complete PCI Express Solution helps reduce the integration risks of SoC designs", said Brian Daellenbach, President, Northwest Logic.
"By using our combined products, designers are offered an easy-to-implement solution and helps bring their products to market more quickly".
The silicon-proven ARM Velocity VSL210 PHY, a member of the ARM Velocity 200 PHY series, is fully compliant with the PCI Express Base 1.0a/1.1 specification with PIPE (PHY Interface for PCI Express) interface.
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The Velocity PHY offers exceptional jitter performance, low-power consumption, and extensive testability within a small physical size.
Northwest Logic's PCI Express IP cores are available in x1, x4 and x8 lane configurations.
The cores are specifically designed for ease-of-use including built-in high-performance, multi-channel, on-demand DMA engine, simple user interface and a complete status port.
Additionally, Northwest Logic's PCI Express Solution includes a verification suite, x8 lane development board with the ARM Velocity VSL210 PHY, drivers and demonstration application.
The combination of the ARM Velocity PHY and Northwest Logic PCI Express provides a robust, fully-validated, cost-effective PCI Express system solution.
This solution has been fully PCI-SIG certified to be PCI Express 1.0a/1.1 compliant.
This solution provides the tools needed to rapidly and successfully develop and bring to market a PCI Express SoC.
"The PCI Express bus technology addresses the increasing bandwidth demands designers encounter in next-generation high-performance applications", said Brent Dichter, General Manager, Physical IP, ARM.
"This combined PCI-SIG-compliant solution helps assure customers that their PCI Express design goals can be successfully achieved".
The ARM Velocity PHY is immediately available.
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