Serial ATA PHY IP produces easy silicon

Astro Semiconductor has released a line of "siliconised" analogue IP including a 1.5Gbit/s Serial ATA PHY compliant with Gen 1 of the Serial ATA 1.0a specification.

Astro Semiconductor has released a line of "siliconised" analogue IP including its first storage product - a 1.5Gbit/s Serial ATA PHY (physical layer) compliant with Gen 1 of the Serial ATA 1.0a specification.

The Serial ATA PHY uses a digital equalisation filter at its input to significantly improve the receive channel's input jitter tolerance.

A digital clock and data recovery scheme ensures low power consumption, easy portability across foundries and noise immunity in a low-cost system.

The Serial ATA PHY is proven in TSMC's 0.18-micron CMOS process.

Astro also launched a SPI-4 Phase 2 PHY and a HyperTransport PHY as part of its communication line of products and added a high-performance amplifier platform and PCI-X 1.0 I/O to its consumer product line.

Astro's technology includes a novel design approach - Adaptive-Dynamic Biasing (ADB) - for achieving low power without sacrificing performance.

The transistors are biased dynamically to match the operating speed using an adaptive feedback technique, resulting in a circuit that minimises power dissipation while meeting all the speed requirements.

Additional benefits of ADB are that circuits have a broad range of operating speed and that process, temperature and supply voltage variations have minimal impact on circuit operation.

In the area of methodology, Astro's Automatic Process-Characterised Porting technique allows efficient porting of analogue IP.

A new process is characterised using Spice simulations, devices are resized based on the characterisation, and the results are verified - all automatically.

"Analogue design and integration has historically been a bottleneck in the system-on-chip arena for the ASIC as well as the COT flow, and analogue will only become more challenging, going forward", said Anjan (AJ) Sen, President/CEO of Astro.

"Digital CMOS is getting less analogue-friendly as geometries shrink and operating voltages approach a transistor's threshold voltage.

Furthermore, on a large deep submicron (DSM) IC, noise from millions of fast-switching digital gates that lie adjacent to analogue circuitry can pose serious problems.

For this reason, we have ensured that products such as our Serial ATA PHY have the highest levels of power supply and substrate noise rejection, so that they can be successfully integrated into large ASICs.

This translates to a robust mixed-signal chip that operates to specification even in a cheap, mass-produced system".

"We are pleased to be working in close partnership with Astro Semiconductor by offering our serial ATA host and target IP tuned for Astro's Serial ATA PHY", said Jim Venable Vice President of Worldwide Marketing and Sales for Palmchip Corp.

"Because of our strategic relationship with Astro we can offer our customers a complete Serial ATA solution allowing them to capitalise on this fast growing market opportunity while enabling us to capture a significant share of the market as it rapidly transitions from parallel to serial ATA".

Astro is focused on three market segments: storage, communications and consumer.

In storage, Astro will release a 3Gbit/s Serial ATA II PHY and a 3Gbit/s Serially-Attached SCSI (SAS) PHY this year.

In consumer, Astro will release a family of high-speed video data convertors, PCI-X 2.0 I/O, and a high-bandwidth amplifier this year.

Astro's IP is available for licensing today.

Pricing is dependent on the customer's specific requirements.

Astro will support a variety of flexible engagement models including design and development of strategically relevant custom analogue IP.

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