Product category:
Design and Development Software
News Release from: Apache Design Solutions | Subject: RedHawk
Edited by the Electronicstalk Editorial
Team on 22 September 2006
Closure software balances power and
performance
Fabless semiconductor company PA Semi used Apache's RedHawk power closure solution for the design of its low-power processor on the 65nm process.
Fabless semiconductor company PA Semi used Apache's RedHawk power closure solution for the design of its low-power processor on the 65nm process PA Semi used RedHawk during its design process to identify physical design issues and to verify the integrity of its power grid design
This article was originally published on Electronicstalk on 14 Jun 2005 at 8.00am (UK)
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TSMC adopts dynamic power integrity solution
TSMC has incorporated Apache's RedHawk with PowerGate technology for the verification of advanced low power and leakage control designs in its Reference Flow 6.0.
Software guarantees dynamic power integrity
A dynamic power integrity solution offers analysis and optimisation of low power and leakage control designs.
"Power delivery is a fundamental design consideration for our-next generation processor".
"Apache delivers the enabling technology to improve the integrity of our power grid", said Sribalan Santhanam, Vice President of Engineering, Design Group, PA Semi.
"We are impressed with the robustness of Apache's solution, as well as the responsiveness of its support and R and D staff".
"Over the past few months, we have seen a steady increase in 65nm design starts and we are pleased to be part of the solution that is enabling low power leaders such as PA Semi to meet the power/performance metrics with confidence", said Dian Yang, Vice President of Product Management at Apache.
"The rapid adoption of Apache's power integrity solution demonstrates the market's need for a full-chip dynamic power solution that delivers accuracy, performance and productivity".
RedHawk is a full-chip Vectorless Dynamic physical power integrity solution for SoC power closure signoff of 130, 90 and 65nm designs.
Correlated with silicon measurements and Spice, RedHawk addresses dynamic power issues such as simultaneous switching output (SSO) for core, memory, clock, and I/O, as well as effects of on-chip inductance, package RLC, and decoupling capacitance.
RedHawk delivers transistor-level accuracy with cell-based capacity, performance and ease of use.
With RedHawk designers can identify dynamic "hot spots", examine the impact on timing, accurately pinpoint the cause of dynamic voltage drop, and automatically repair the source of supply noise.
RedHawk enables designers to reach power closure sign-off for high performance SoCs, including those utilising advanced low-power design techniques such as leakage current control, MTCMOS (power-gating), multiple voltage domains, and multiple threshold transistors.
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