Product category:
Intellectual Property Cores
News Release from: ARC International
Edited by the Electronicstalk Editorial
Team on 02 September 2004
Tektronix licenses cores and development
tools
Tektronix has licensed the ARC 600 core, the ARC MQX RTOS, MetaWare development tools and the MetaSim cosimulation tool for use in its next-generation products.
Tektronix has licensed the ARC 600 core, the ARC MQX RTOS, MetaWare development tools and the MetaSim cosimulation tool for use in its next-generation products "The ARC 600 was selected over some tough competition based on its technical merits", said Dave Brown, Vice President, Central Engineering, Tektronix
This article was originally published on Electronicstalk on 20 Feb 2001 at 8.00am (UK)
Related stories
ARC emulators use JTAG to cut external hardware
Available from ARC Cores are the first JTAG emulators for a configurable processor to provide powerful development and test capabilities normally only available with external hardware.
Board supports soft-processor-based SoC designs
ARCangel 3 from ARC Cores is a new development platform supporting the latest available FPGAs.
"In addition to the strengths of the core design, we were able to purchase a sophisticated bundled product that includes the configurable, extendible core, easy-to-use development and cosimulation tools, and an integrated RTOS".
"This bundled package makes complete system-level design much easier and more efficient, and will save us both time and effort".
The ARC 600 is a configurable, extendible RISC CPU/DSP processor that allows Tektronix to easily integrate its internal and third-party IP to provide the optimal high-performance SoC solution required for its broad range of industry leading products.
Further reading
Integrated development package for Bluetooth SoCs
BlueForm from ARC Cores is a comprehensive package of hardware and software IP, development tools and application software for building Bluetooth SoC products based on the ARCtangent processor.
Novel architecture mixes 16 and 32bit instructions
ARCompact is an innovative instruction set architecture (ISA) from ARC Cores that allows designers to mix 16 and 32bit instructions on its 32bit user-configurable processor.
The ability to integrate existing IP will result in reduced silicon area as well as chip count over previous designs and providing Tektronix an overall reduction in system cost.
"Tektronix will use the ARC 600 core in its sophisticated instrumentation and measurement products that require leading-edge microprocessor and DSP technology", said Derek Meyer, ARC Marketing Vice President.
"The ARC 600 delivers maximum efficiency by providing a high performance low area multi-functional RISC CPU/DSP core, that can be configured to Tektronix's exact product needs".
Other features of importance to Tektronix include ARC's extendable C/C++ complier and simulator that allow hardware/software tradeoffs to be made when adding instruction extensions, and the MetaSim integrated cosimulation system that allows engineers to perform high-speed system-level hardware/software coverification for early firmware development.
The ARC 600 RISC CPU/DSP delivers similar performance to leading-edge DSP cores in a fraction of the area.
By combining RISC and DSP functions within a single core, the ARC 600 can replace a dual processor system while dramatically reducing area and power.
An added benefit is that software development for both CPU and DSP configurations can be done with one tool chain, enabling faster software development and quicker time to market.
The ARC 600 with DSP also provides optional high-bandwidth x-y memory to target higher performance applications.
The DSP extensions fully use the ARC 32bit architecture and SIMD instructions to aid in accelerating functions such as Viterbi and FFT.
• ARC International: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page
Search the Pro-Talk network of sites
