Floating point extensions oust coprocessor chips

ARC International has developed new floating point extensions (FPX) for the ARC600 and ARC700 processor core families.

ARC International has developed new floating point extensions (FPX) for the ARC600 and ARC700 processor core families.

By implementing IEEE754-compliant floating point functionality using the extendibility feature of ARC's patented configurability, ARC can achieve up to 90% reduction in gate count compared with competing floating point coprocessors with comparable performance.

ARC FPX extensions provide direct execution in hardware of the most frequently used floating point functions, which greatly accelerates computations requiring high maths precision.

Applications that using floating point processing include graphics, image processing, printers, GPS, automotive controls and instrumentation.

ARC FPX has already has been licensed by an ARC customer for use in a data input device.

Traditional approaches to hardware floating point processing require a coprocessor to execute instructions in accordance with the IEEE754 standard.

The resulting designs are complex and consume additional silicon area - in some cases even more than the host CPU.

ARC's FPX solution uses hardware extensions to accelerate the proven IEEE754 compliant ARC MetaWare maths library.

ARC FPX extensions achieve near coprocessor performance with much smaller die area and power consumption.

The most frequently used floating point instructions, including addition, subtraction and multiplication, are implemented in hardware; the other elements of the IEEE specification are implemented in software.

ARC FPX also provides configuration flexibility that is not available with coprocessors.

Using the ARChitect configurator tool, SoC designers can easily select which extensions to include in their chip design: single precision only, double precision only, or both.

In addition, users who wish to further accelerate their code can use ARC's extendible architecture and EIA tool to implement more math instructions specifically for their application.

"ARC's new floating point extensions are an excellent example of the benefits of configurability", said Derek Meyer, Vice President of Marketing for ARC International.

"Adding a large coprocessor can be cost-prohibitive in many cost-sensitive designs".

"By offering floating point functionality as extensions to ARC's cores, we are able to provide customers with a cost-effective way to design computationally intensive applications".

ARC's single precision floating point extensions are available now.

Double precision extensions will be available in the early summer of 2005.

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