Abilis to use configurable core in mobile TV SoC

The configurable ARC 605 processor has been adopted by Abilis Systems for the development of a single-chip TV receiver solution targeted at mobile TV terminals.

The configurable ARC 605 processor has been adopted by Abilis Systems, a Kudelski Group company, for the development of a single-chip TV receiver solution targeted at mobile TV terminals.

The ARC 605 is an ultrasmall configurable 32bit CPU/DSP processor, which was chosen by Abilis Systems because of its low gate count, low power consumption, and ability to incorporate custom instruction extensions that provide a high degree of differentiation and security compared with "fixed architecture" alternatives.

The configurable ARC 605 core will serve as the control CPU in Abilis Systems' mobile TV chip that will be demonstrated at the upcoming 3GSM conference.

Abilis Systems' single-chip "antenna-to-digital" system solution is fueling the high-growth mobile TV market that is predicted to pass the 100 million-subscriber milestone by 2010.

By relying on a configurable ARC processor, Abilis Systems' chips can meet OEM requirements for SoCs with a small footprint, power sensitivity, and multi-mode flexibility using a unified microprocessor architecture that combines DSP with RISC logic functionality.

"Configurability was a key decision factor for us".

"The CPU's flexibility enables us to support our current and future specific requirements, including the security constraints related to the Conditional Access function", said Yves Mathys, CEO of Abilis Systems.

"Using ARC's configurable processor, we quickly completed the design process and have taped out our first ARC-based chip in record time".

"The result is a unique product that surpasses existing market offerings".

"Abilis Systems is the latest example of a fast-growth company to adopt configurable processors for a market where differentiation and low cost are keys to success", said Derek Meyer, Senior Vice President of Sales and Marketing at ARC International.

"We welcome Abilis Systems to the growing community of ARC customers".

The ARC 605 processor core is the world's smallest, lowest power configurable 32bit core.

In a 0.13um process, it offers a maximum clock frequency of 400MHz, power consumption of 0.06mW/MHz and a die size of 0.31mm2.

The configurable ARC 605 core is ideal for a wide range of embedded control and computing functions within SoCs.

The core is designed for hard real-time processing, where high speed and deterministic response are required.

All of ARC's cores are created with ARChitect - ARC's revolutionary patented configuration tool.

ARChitect's GUI-based development environment offers SoC designers a simple drag-and-drop menu from which they can select from up to 20,000-plus preconfigured options or create custom instruction extensions that are optimised to the ARCompact ISA.

In minutes, customers can use ARChitect to create a highly differentiated, proprietary ARC-Based processor that provides a competitive advantage while consuming less power and containing fewer transistors than fixed architecture alternatives.

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