Product category:
Power Supply ICs and Controllers
News Release from: Arques Technology | Subject: AQ9105
Edited by the Electronicstalk Editorial
Team on 02 December 2003
Linear regulator powers up DDR SRAMs
The AQ9105 is a dual linear regulator designed to meet the voltage specifications for DDR-SDRAM as defined in JEDEC JESD79C.
The AQ9105 is a dual linear regulator designed to meet the voltage specifications for DDR-SDRAM as defined in JEDEC JESD79C, including both the VDDQ memory core voltage and the VTT termination voltage With a 5-lead TO-263 or TO-252 package, the AQ9105 can generate clean VDDQ and VTT simultaneously from a single 3.3V input, meeting SSTL DDR specifications
This article was originally published on Electronicstalk on 16 Dec 2003 at 8.00am (UK)
Related stories
Buck controller joins with two LDOs
The AQ9220 is a highly integrated three-output voltage controller.
The VDDQ output can source up to 5A, and VTT can source or sink up to +/-3A.
Using two external resistors to the ADJ/SD pin, the VDDQ voltage can be set between 1.8 and 2.6V.
VTT automatically tracts at half of VDDQ.
A shutdown function can be implemented by pulling the ADJ/SD pin to VIN.
With its unique circuit approach, a very low dropout voltage is achieved; for VDDQ it is typically 600mV at 5A, over the temperature range.
Quiescent current is less than 5mA.
The AQ9105 provides fast transient response to the dynamic loading of DDR, and has excellent (sub-2%) regulation over line, load and temperature variations.
It also has built in over current limit with foldback and thermal shutdown at 170C.
Devices are available now priced at $0.45 each in quantities of 1000.
• Arques Technology: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page
Search the Pro-Talk network of sites
