Customisable MCU has ARM7 core

Customisable microcontroller combines ARM7-based CPU with up to 450,000 equivalent ASIC gates in a metal programmable block for custom logic netlist conversion.

Atmel has extended its CAP family of customisable microcontroller-based SoC products with an ARM7 core.

The new CAP7 customisable microcontroller is architecturally compatible with Atmel's broad range of off-the-shelf ARM7-based MCUs and incorporates metal programmable cell fabric (MPCF) technology to integrate up to 450,000 equivalent ASIC gates in a metal programmable block for custom logic netlist conversion.

Atmel's flexible design flow allows an easy conversion path from FPGA netlist to the metal programmable block.

According to Atmel's Marketing Director, Jay Johnson: "Design engineers frequently use programmable ICs to accelerate their proprietary DSP algorithms in a gate array technology".

"Many choose FPGAs which represent a flexible, cost-effective solution for market-testing new products, when volumes cannot be predicted".

"However, once production ramp begins and controlling bill of materials is a priority, our CAP7 customisable MCUs offer a painless cost reduction path, without the typical NRE and long development cycle associated with a standard cell ASIC".

By eliminating an external FPGA, Atmel's customisable microcontrollers can reduce IC costs by at least 50%.

For example, in medium volumes (50,000 units), a 1 to 2 million gate FPGA and ARM7 MCU, two-chip solution, market price is between US $13 and $20.

With unit prices under $6, CAP7 can cut the cost by more than half.

In addition, with an 80MHz CAP7, designers can double performance and reduce power consumption by 90%, compared with 1 to 2W FPGA solutions.

The initial CAP7 product release includes the AT91CAP7S, based on the ARM7TDMI processor core.

The AT91CAP7S has 160Kbyte of on-chip fast SRAM and a block of either 250,000 or 450,000 metal programmable ASIC gates.

Peripherals include USB device, SPI master and slave, two USARTs, three 16bit timer counters, an eight-channel 10bit analogue to digital convertor, and a full complement of supervisory functions.

Additional peripherals from Atmel's extensive IP library or customer IP may be instantiated in the MP block.

There is a one-time charge of US $150,000 for design, mask fees, and prototypes.

The CAP7 is available now for design.

The AT91CAP7S250 in a 144 pin LQFP package is priced at US $5.44 for 50K unit quantities.

About MPCF.

The MPCF technology offers the density and unit costs of cell-based ASICs with the quick turn around and low NREs of gate arrays.

The key to the MPCF technology is an eight-transistor core cell that is only 3.2um high and 2.0um wide in Atmel's 130nm process, achieving densities up to 210,000 usable gates per square millimetre which is 35% more available gates than sea-of-gates technology.

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