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Predictive analysis aids pre-siilcon prototyping

An Atrenta product story
Edited by the Electronicstalk editorial team Dec 8, 2003

Atrenta and Aptix have developed a set of RTL coding rules for pre-silicon prototyping that ensure efficient mapping to Aptix's multi-FPGA prototyping platform.

Atrenta and Aptix have developed a set of RTL coding rules for pre-silicon prototyping that ensure efficient mapping to Aptix's multi-FPGA prototyping platform.

The rule-set is made available as the Aptix Policy for Atrenta's SpyGlass predictive analyser.

Targeted for both design and verification engineers, the Aptix Policy for SpyGlass helps both groups follow best practices and ensure code compliance with design-for-prototyping principles.

For designers it provides a comprehensive set of rules around which to efficiently code their RTL for FPGAs.

For verification engineers it ensures that they are receiving clean RTL while providing in-depth design information.

More of the verification engineer's time can be spent discovering real design bugs as opposed to FPGA incompatibilities.

The end result is a streamlined RTL-to-PSP flow, a more efficiently verified and validated SoC, and quicker time to market.

Atrenta worked directly with Aptix to define and test the most critical guidelines relating to the RTL-to-prototype flow.

Using the fast-synthesis and logic evaluation technologies of the SpyGlass platform, the Aptix Policy performs in-depth structural analysis on Verilog and VHDL RTL to flag violations.

After running a design through Spyglass, users can use Aptix's logic mapping software, Design Pilot to map their designs to Aptix's reconfigurable PSP, System Explorer, or to any standard PCB platform.

Atrenta's first release of the Aptix predictive analysis solution comprises a set of rules that relate to FPGA synthesis compliance, successful prototype versus simulation comparison, and pertinent design information for verification engineers.

Charlie Miller, Aptix Sr Vice President of Marketing and Business Development, said: "Aptix has more experience in pre-silicon prototyping than any other company.

Part of our expertise is knowing the best way to design for prototyping.

This new Aptix Policy for Atrenta's SpyGlass predictive analyser captures that knowledge for use by our mutual customers".

"At Atrenta we are committed to solving our customers design productivity challenges", stated Ghulam Nurie, Atrenta's Sr Vice President of Marketing and Business Development.

"It is our strategy to address our customer's critical design issues as well as optimise their tool flow.

By partnering with Aptix, we bring a set of new capabilities to help our mutual customers write pre-silicon prototype ready RTL from the start.

This removes late stage RTL changes and enables a smooth transition from simulation to pre-silicon prototyping".

This Aptix policy is available now for use in SpyGlass 3.3 or later.

It is sold and supported by Atrenta and its distributors.

It runs on Sun/Solaris 2.5-2.8, HP-UX 10.2 and RedHat Linux 7.

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