Product category:
Design and Development Software
News Release from: Avant! Corporation
Edited by the Electronicstalk Editorial
Team on 28 February 2002
Ricoh uses Avant! tools on
3.5-million-gate ASIC
Ricoh has used Avant!'s advanced Astro physical optimisation, placement and routing solution to successfully tape out a 0.18-micron, 3.5-million-gate, 125MHz digital-imaging-system LSI.
Ricoh has used Avant!'s advanced Astro physical optimisation, placement and routing solution to successfully tape out a 0.18-micron, 3.5-million-gate, 125MHz digital-imaging-system LSI Using Astro, Ricoh quickly achieved desired design timing that was previously unattainable
This article was originally published on Electronicstalk on 7 Jun 2001 at 8.00am (UK)
Related stories
Sign-off solution sorts submicron bugs
Avant! Corp claims that Star-Rail is the industry's first ultra deep submicron (UDSM) sign-off solution for IR drop and electromigration analysis of power distribution networks.
Verification for IBM's latest logic
Available now from Avant! are production-ready Hercules-II physical verification rule files for design rule checking IBM's 0.13-micron CMOS 8SF foundry logic process technology.
"Astro enabled us to meet the aggressive timing requirements of the design, requirements that could not be met after several weeks of effort with previous tools, and to achieve this timing closure in just a few days", said Zenji Oka, Manager of CAD Engineering Section, Imaging System LSI Development Center, at Ricoh.
"This achievement with Astro translates into a tremendous overall improvement in our design productivity.
We are extremely satisfied with Astro's capacity that allowed us to complete this 3.5-million-gate design with a flat design style, thereby providing a shorter design time and a less complicated flow than with a hierarchical design style.
Astro's powerful timing-closure flow and capacity for huge designs provide a multifold productivity advantage to Ricoh".
Astro is the advanced ultra-deep-submicron sUDSM), design-closure solution from Avant!, the long-time industry leader in physical design automation.
Astro's PhySiSys technology, an advanced set of concurrently applied logical and physical optimisations, closes the toughest timing, signal integrity, and power integrity requirements for the most complex UDSM designs.
The Milkyway-DUO architecture, a break-through data architecture in Astro, allows concurrent optimisation of timing, logic, placement, clocks, signal integrity, power integrity, and routing in a fast, memory-efficient way, enabling designers to handle multi-million-gate SoC designs easily.
"Since its introduction, Astro has achieved quick design closure for even the largest SoC designs", said Dr Paul Lo, president at Avant! Corp.
"We are extremely pleased that Ricoh achieved a huge design-productivity gain by using Astro for their multi-million-gate ASIC design.
Their achievement is further evidence that our substantial investment in research and development continues to increase Avant!'s technology lead in design automation".
• Avant! Corporation: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page
Search the Pro-Talk network of sites
