RTOS provides real-time performance

AVIX RTOS V2.01 works with pools of fixed-size blocks where both the number of blocks in a pool and the size of a block are user-specified.

AVIX-RT has released version 2.01 of its AVIX RTOS for Microchip PIC24 and dsPIC.

It offers support for memory pools usable from user threads and interrupt service routines.

The mechanism works with pools of fixed size blocks where both the number of blocks in a pool and the size of a block are user specified.

The mechanism operates in a bound time making it suitable for use in hard real-time environments.

As part of this release a number of performance enhancements have been made.

TogAVIX is benchmarked against the open source Thread-Metric performance test suite.

This test suite contains seven tests where for five of these AVIX has by far the best performance.

For the other two tests, AVIX is second.

An overview of the results can be found on the AVIX-RT website.

The new features and performance of AVIX are combined with the "zero latency" design, where by never disabling interrupts, interrupt latency is not increased by a single cycle, greatly reducing the chance of losing interrupts.

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