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Simulator brings SystemC into the mix

An Aldec product story
Edited by the Electronicstalk editorial team Sep 2, 2004

Riviera now has a direct simulation kernel connection with SystemC, creating a highly efficient system-level cosimulation environment for next generation design and verification methods.

The latest release of Riviera features a direct simulation kernel connection with SystemC, creating a highly efficient system-level cosimulation environment for next generation design and verification methods.

"Traditionally, only early adopters have had the advantage of designing with the latest methodologies offered to the market".

"Aldec aims to change that with its release of Riviera 2004.08 by offering a completely integrated, mixed-HDL and SystemC solution at an affordable price", said Eric Seabrook, Product Marketing Manager at Aldec.

"With the release of Riviera 2004.08, design teams can now afford a true system-level verification solution for developing the next generation silicon".

Aldec has implemented a direct kernel connection between Riviera's mixed-language VHDL, Verilog and SystemVerilog HDL compilers and the C/C++ compiler providing a seamless cosimulation environment for SystemC, independent of the entry language.

This was previously accomplished only through slower communication interfaces such as PLI/VPI.

Riviera 2004.08 allows the engineer's design and verification tools to create SystemC modules, compile and cosimulate them using the external C compiler without the unnecessary overhead.

Results of cosimulation can be examined in Riviera's Waveform Viewer/Editor.

In addition to cosimulation, SystemC provides an ideal environment for transaction-level testbench development when used in conjunction with the SystemC Verification Library (SCV).

Design engineers are able to create more robust testbenches in a much shorter period of time using SystemC, and because they are at the transaction-level, execution can be up to 100x faster than event-driven testbenches.

"Utilising a higher abstraction language like SystemC for modelling and testbench development is an ideal solution to the problems created as designs grow in complexity", Seabrook continued.

"Aldec is committed to taking the next step toward an affordable system-level solution with Riviera 2004.08 and also to providing the training and support that is needed with new verification methodologies".

Riviera 2004.08 includes several sample designs that illustrate the advantages of using SystemC with HDL and the benefits that system-level verification engineers can obtain from such an approach.

As most system designers are already fluent in C++, SystemC is the fastest bridge between traditional hardware engineers and system engineers.

However, without the necessary education, most engineers have been reluctant to try it.

Riviera 2004.08's support of SystemC will offer an advantage to users because it provides hardware-oriented constructs within the context of C++ as a class library implemented in standard C++.

Its use spans design and verification from concept to implementation in hardware and software.

SystemC provides an interoperable modelling platform which enables the development and exchange of very fast system-level C++ models.

It also provides a stable platform for development of system-level tools.

"OSCI is committed to promoting innovative system-level design solutions based on SystemC to the community of system, semiconductor and IP companies", said Mike Meredith, Executive Director of the Open SystemC Initiative.

"We applaud the efforts that Aldec is making that are bringing the benefits of SystemC to the mainstream".

Riviera 2004.08 is available today based on a floating OS-independent license that supports Unix, Windows and Linux.

Riviera 2004.08 is sold directly by Aldec in the USA as well as by authorised international distributors.

A free evaluation copy of Riviera is available from the Aldec website.

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