Third party development support for FPGAs

Active-HDL Design Flow Manager supports the Cyclone III FPGA family and provides access to Altera's Quartus II software version 7.0 and third-party synthesis tools.

Aldec, a developer of mixed-language simulation and advanced design tools for ASIC and FPGA devices, is providing full support in its Active-HDL and Riviera lines of products for Altera's new low-cost Cyclone III device family.

Aldec has updated its Active-HDL Design Flow Manager to support the Cyclone III FPGA family and provide access to Altera's Quartus II software version 7.0 and third-party synthesis tools.

As Active-HDL and Riviera users have access to precompiled Cyclone III libraries, they may use this new family in their designs immediately.

In addition, Quartus II software version 7.0 users can select Aldec mixed language simulation technology to perform both RTL and gate-level simulation using the standard NativeLink interface provided by Altera.

"Support for Altera's Cyclone III devices in the latest release of our simulator provides our mutual customers access to the latest low-cost and low-power devices being offered by Altera", stated David Rinehart, VP of Marketing at Aldec, adding "with our unrestricted, mixed-language simulation and efficient debugging tools designers are able to fully use the advanced features the new Cyclone III family offers".

"Our Cyclone III FPGAs provide customers with an unprecedented combination of low power, high functionality, and low cost", says Danny Biran, Vice President of Product and Corporate Marketing at Altera.

"Support from Aldec for our new low-cost FPGA family allows customers to begin their designs immediately with minimal effort".

The Altera flow update for Quartus II software version 7.0 and precompiled Cyclone III libraries are available for all Aldec users as part of the standard maintenance contract.

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