http://www.electronicstalk.com/news/bek/bek000.html Berkeley Design Automation news releases on Electronicstalk en-gb Copyright (C)2008 Pro-Talk Ltd. All rights reserved. Sat, 22 Nov 2008 08:00:00 UT Sat, 22 Nov 2008 08:00:00 UT http://www.pro-talk.com/images/protalklogo90.gif http://www.pro-talk.com/ 90 79 Berkeley Design Automation has announced what it claims as the industry's first closed-loop noise analysis of fractional-N phase-locked loops (PLLs) at the transistor level. Tue, 28 Oct 2008 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek117.html Sunplus Technology selected Analog FastSpice because it delivered speed and accuracy advantage in the verification of complex analogue and mixed-signal ICs. Wed, 25 Jun 2008 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek116.html Analog FastSpice Co-Simulation delivers identical results 5-10x faster than any other true Spice-accurate solution. Thu, 05 Jun 2008 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek115.html Advanced algorithms and numerical analysis techniques rapidly solve the full-circuit matrix and the original device equations without any shortcuts. Fri, 30 May 2008 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek114.html Analog FastSpice meets TSMC's 40nm Spice tool certification requirements on device model certification and Spice netlist compatibility qualification. Mon, 19 May 2008 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek113.html Noise Analysis Option provides transistor-level noise analysis, including analysis of the impact of white and flicker noise, with true Spice accuracy for every type of circuit. Thu, 01 May 2008 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek112.html Analog FastSpice enables researchers to verify a complete 10GHz full-circuit PLL synthesiser for a wideband satellite TV tuner at the transistor-level with true Spice accuracy. Wed, 26 Mar 2008 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek111.html Analog FastSpice enables SiPort's designers to verify their digital multimedia broadcast receiver designs in a fraction of the time required by traditional Spice tools. Wed, 12 Dec 2007 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek110.html Beceem's design teams can now complete full WiMAX transceiver circuit verification as well as verify complex blocks 5-10x faster. Wed, 31 Oct 2007 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek109.html BDTI used its BDTI Communications Benchmark (OFDM) to evaluate the performance of the PC102, a programmable multicore digital signal processor. Thu, 18 Oct 2007 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek108.html Analog FastSpice enables Atheros' designers to verify their nanometre-scale gigahertz analogue and RF circuits in a fraction of the time required by traditional Spice tools. Wed, 07 Mar 2007 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek107.html Tools deliver Full-Spice Accuracy at 5x-10x Performance Without Tuning Tue, 25 Jul 2006 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek106.html The world's largest consumer electronics company has made an investment in the Berkeley Design Automation through its venture group based in San Jose. Tue, 18 Jul 2006 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek105.html Berkeley Design Automation has appointed Paul Estrada as Chief Operating Officer. Tue, 11 Jul 2006 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek104.html Berkeley Design Automation has been selected as a winner of the annual "Red Herring 100 North America" award by Red Herring magazine. Tue, 23 May 2006 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek103.html Elpida Memory uses PLL Noise Analyzer to guarantee the high performance, low noise and low power specifications for the phase-locked loops in its advanced memory chips. Tue, 09 May 2006 08:00:00 UT Berkeley Design Automation http://www.electronicstalk.com/news/bek/bek102.html